ICSSSTUAF32868B View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

MFG CO.

ICSSSTUAF32868B

28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

Integrated Device Technology 

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ICSSSTUAF32868B

28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

Register Timing

RESET

CSGEN

DCS0

DCS1

CLK

COMMERCIAL TEMPERATURE GRADE

tINACT

CLK

Dn, DODTn,

DCKEn

Qn, QODTn,

QCKEn

tRPHL

RESET to Q

PARIN

QERR

tRPLH

RESET to QERR

H, L, or X

H or L

NOTE:

1.After RESET is switched from LOW to HIGH, all data and clock inputs signals must be set and held at valid logic

levels (not floating) for a minimum time of tINACTMAX.

28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

17

ICSSSTUAF32868B

7102/2

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