ISL9014AIRGCZ View Datasheet(PDF) - Renesas Electronics
Part Name
Description
MFG CO.
'ISL9014AIRGCZ' PDF : 13 Pages View PDF
ISL9014A
If EN2 is brought high, and EN1 goes high after VO2 starts its
output ramp, then the ISL9014A immediately starts to ramp up
the VO1 output.
If both EN1 and EN2 are brought high at the same time, the
VO1 output has priority, and is always powered up first.
During operation, whenever the VIN voltage drops below about
1.8V, the ISL9014A immediately disables both LDO outputs.
When VIN rises back above 2.1V, the device
re-initiates its start-up sequence and LDO operation will
resume automatically.
Reference Generation
The reference generation circuitry includes a trimmed
bandgap, a trimmed voltage reference divider, a trimmed
current reference generator, and an RC noise filter. The filter
includes the external capacitor connected to the CBYP pin. A
0.01µF capacitor connected CBYP implements a 100Hz
lowpass filter, and is recommended for most high performance
applications. For the lowest noise application, a 0.1µF or
greater CBYP capacitor should be used. This filters the
reference noise to below the 10Hz to 1kHz frequency band,
which is crucial in many noise-sensitive applications.
The bandgap generates a zero temperature coefficient (TC)
voltage for the reference divider. The reference divider
provides the regulation reference and other voltage references
required for current generation and
over-temperature detection.
The current generator outputs references required for adaptive
biasing as well as references for LDO output current limit and
thermal shutdown determination.
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain
operational amplifier driving a PMOS pass transistor. The
design of the ISL9014A provides a regulator that has low
quiescent current, fast transient response, and overall stability
across all operating and load current conditions. LDO stability
is guaranteed for a 1µF to 10µF output capacitor that has a
tolerance better than 20% and ESR less than 200m. The
design is performance-optimized for a 1µF capacitor. Unless
limited by the application, use of an output capacitor value
above 4.7µF is not recommended as LDO performance
improvement is minimal.
Soft-start circuitry integrated into each LDO limits the initial
ramp-up rate to about 30µs/V to minimize current surge. The
ISL9014A provides short-circuit protection by limiting the
output current to about 475mA.
Each LDO uses an independently trimmed 1V reference. An
internal resistor divider drops the LDO output voltage down to
1V. This is compared to the 1V reference for regulation. The
resistor division ratio is programmed in the factory.
Overheat Detection
The bandgap outputs a proportional-to-temperature current
that is indicative of the temperature of the silicon. This current
is compared with references to determine if the device is in
danger of damage due to overheating. When the die
temperature reaches about +145°C, one or both of the LDO’s
momentarily shut down until the die cools sufficiently. In the
overheat condition, only the LDO sourcing more than 50mA
will be shut off. This does not affect the operation of the other
LDO. If both LDOs source more than 50mA and an overheat
condition occurs, both LDO outputs are disabled. Once the die
temperature falls back below about +110°C, the disabled
LDO(s) are re-enabled and soft-start automatically takes place.
FN6438 Rev 3.00
December 10, 2015
Page 11 of 13
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