IT8673F View Datasheet(PDF) - ITE Tech. INC.
Part Name
Description
MFG CO.
'IT8673F' PDF : 128 Pages View PDF
10.11.30 SMI# Pin Mapping Register (Index=FFh, Default=00h)
Bit
Description
7-6 Reserved
5-0 SMI# Pin Location. Please see Location mapping table note3 on page 40.
10.11.31 SMI# Control Register 1 (Index=E0h, Default=00h)
Bit
Description
7 Enables the generation of an SMI# due to GP IRQ Steering 1’s IRQ (EN_GPIRQ1).
6 Enables the generation of an SMI# due to KBC(PS/2 Mouse)’s IRQ (EN_MIRQ).
5 Enables the generation of an SMI# due to KBC(Keyboard)’s IRQ (EN_KIRQ).
4 Enables the generation of an SMI# due to FAN Controller’s IRQ (EN_ECIRQ).
3 Enables the generation of an SMI# due to Parallel Port’s IRQ (EN_PIRQ).
2 Enables the generation of an SMI# due to Serial Port 2’s IRQ (EN_S2IRQ).
1 Enables the generation of an SMI# due to Serial Port 1’s IRQ (EN_S1IRQ).
0 Enables the generation of an SMI# due to FDC’s IRQ (EN_FIRQ).
10.11.32 SMI# Control Register 2 (Index=E1h, Default=00h)
Bit
Description
7 Forces to clear all the SMI# status register bits, non-sticky.
6 0: Edge trigger. 1: Level trigger.
5-2 Reserved
1 Enables the generation of an SMI# due to APC Switch Button(EN_BTN).
0 Enables the generation of an SMI# due to GP IRQ Steering 2’s IRQ (EN_GPIRQ2).
10.11.33 SMI# Status Register 1 (Index=E2h, Default=00h)
This register is used to read the status of SMI# inputs.
Bit
7 GP IRQ Steering 1’s IRQ.
6 KBC(PS/2 Mouse)’s IRQ.
5 KBC(Keyboard)’s IRQ.
4 FAN Controller’s IRQ.
3 Parallel Port’s IRQ.
2 Serial Port 2’s IRQ.
1 Serial Port 1’s IRQ.
0 FDC’s IRQ.
Description
IT8673F
39
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