K4B2G1646C
datasheet
Rev. 1.11
DDR3 SDRAM
[ Table 50 ] Timing Parameters by Speed Bins for DDR3-1600 to DDR3-2133
Speed
Parameter
Clock Timing
Minimum Clock Cycle Time (DLL off mode)
Average Clock Period
Clock Period
Average high pulse width
Average low pulse width
Clock Period Jitter
Clock Period Jitter during DLL locking period
Cycle to Cycle Period Jitter
Cycle to Cycle Period Jitter during DLL locking period
Cumulative error across 2 cycles
Cumulative error across 3 cycles
Cumulative error across 4 cycles
Cumulative error across 5 cycles
Cumulative error across 6 cycles
Cumulative error across 7 cycles
Cumulative error across 8 cycles
Cumulative error across 9 cycles
Cumulative error across 10 cycles
Cumulative error across 11 cycles
Cumulative error across 12 cycles
Cumulative error across n = 13, 14 ... 49, 50 cycles
Absolute clock HIGH pulse width
Absolute clock Low pulse width
Data Timing
DQS,DQS to DQ skew, per group, per access
DQ output hold time from DQS, DQS
DQ low-impedance time from CK, CK
DQ high-impedance time from CK, CK
Data setup time to DQS, DQS referenced
to VIH(AC)VIL(AC) levels
Data hold time to DQS, DQS referenced
to VIH(AC)VIL(AC) levels
DQ and DM Input pulse width for each input
Data Strobe Timing
DQS, DQS differential READ Preamble
DQS, DQS differential READ Postamble
DQS, DQS differential output high time
DQS, DQS differential output low time
DQS, DQS differential WRITE Preamble
DQS, DQS differential WRITE Postamble
DQS, DQS rising edge output access time from rising CK, CK
DQS, DQS low-impedance time (Referenced from RL-1)
DQS, DQS high-impedance time (Referenced from RL+BL/2)
DQS, DQS differential input low pulse width
DQS, DQS differential input high pulse width
DQS, DQS rising edge to CK, CK rising edge
DQS,DQS falling edge setup time to CK, CK rising edge
DQS,DQS falling edge hold time to CK, CK rising edge
Symbol
DDR3-1600
MIN
MAX
DDR3-1866
MIN
MAX
DDR3-2133
MIN
MAX
Units
NOTE
tCK(DLL_OFF)
8
-
8
-
8
-
ns
6
tCK(avg)
See Speed Bins Table
ps
tCK(abs)
tCK(avg)min + tCK(avg)max + tCK(avg)min + tCK(avg)max + tCK(avg)min + tCK(avg)max +
tJIT(per)min
tJIT(per)max
tJIT(per)min
tJIT(per)max
tJIT(per)min
tJIT(per)max
ps
tCH(avg)
0.47
0.53
0.47
0.53
0.47
0.53
tCK(avg)
tCL(avg)
0.47
0.53
0.47
0.53
0.47
0.53
tCK(avg)
tJIT(per)
-70
70
-60
60
-50
50
ps
tJIT(per, lck)
-60
60
-50
50
-40
40
ps
tJIT(cc)
140
120
100
ps
tJIT(cc, lck)
120
100
80
ps
tERR(2per)
-103
103
-88
88
-74
74
ps
tERR(3per)
-122
122
-105
105
-87
87
ps
tERR(4per)
-136
136
-117
117
-97
97
ps
tERR(5per)
-147
147
-126
126
-105
105
ps
tERR(6per)
-155
155
-133
133
-111
111
ps
tERR(7per)
-163
163
-139
139
-116
116
ps
tERR(8per)
-169
169
-145
145
-121
121
ps
tERR(9per)
-175
175
-150
150
-125
125
ps
tERR(10per)
-180
180
-154
154
-128
128
ps
tERR(11per)
-184
184
-158
158
-132
132
ps
tERR(12per)
-188
188
-161
161
-134
134
ps
tERR(nper)
tERR(nper)min = (1 + 0.68ln(n))*tJIT(per)min
tERR(nper)max = (1 = 0.68ln(n))*tJIT(per)max
ps
24
tCH(abs)
0.43
-
0.43
-
0.43
-
tCK(avg)
25
tCL(abs)
0.43
-
0.43
-
0.43
-
tCK(avg)
26
tDQSQ
-
100
-
85
-
75
ps
13
tQH
0.38
-
0.38
-
0.38
-
tCK(avg) 13, g
tLZ(DQ)
-450
225
-390
195
-360
180
ps
13,14, f
tHZ(DQ)
-
225
-
195
-
180
ps
13,14, f
tDS(base)
AC175
-
-
-
-
-
-
ps
d, 17
tDS(base)
AC150
10
-
-
-
-
-
ps
d, 17
tDS(base)
AC135
-
-
0
-
-15
-
ps
d, 17
tDH(base)
DC100
45
-
20
-
5
-
ps
d, 17
tDIPW
360
-
320
-
280
-
ps
28
tRPRE
tRPST
tQSH
tQSL
tWPRE
tWPST
tDQSCK
tLZ(DQS)
tHZ(DQS)
tDQSL
tDQSH
tDQSS
tDSS
tDSH
0.9
0.3
0.4
0.4
0.9
0.3
-225
-450
-
0.45
0.45
-0.27
0.18
0.18
NOTE 19
NOTE 11
-
-
-
-
225
225
225
0.55
0.55
0.27
-
-
0.9
0.3
0.4
0.4
0.9
0.3
-195
-390
-
0.45
0.45
-0.27
0.18
0.18
NOTE 19
NOTE 11
-
-
-
-
195
195
195
0.55
0.55
0.27
-
-
0.9
0.3
0.4
0.4
0.9
0.3
-180
-360
-
0.45
0.45
-0.27
0.18
0.18
NOTE 19
NOTE 11
-
-
-
-
180
180
180
0.55
0.55
0.27
-
-
tCK
tCK
tCK(avg)
tCK(avg)
tCK
tCK
ps
ps
ps
tCK
tCK
tCK(avg)
tCK(avg)
tCK(avg)
13, 19, g
11, 13, b
13, g
13, g
13,f
13,14,f
12,13,14
29, 31
30, 31
c
c, 32
c, 32
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