K60P100M100SF2RM View Datasheet(PDF) - Freescale Semiconductor
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Description
MFG CO.
'K60P100M100SF2RM' PDF : 1809 Pages View PDF
Address
0x0000_01A4
0x0000_01A8
0x0000_01AC
0x0000_01B0
0x0000_01B4
0x0000_01B8
Chapter 3 Chip Configuration
Table 3-4. Interrupt vector assignments (continued)
Vector
IRQ1
NVIC
non-IPR
register
number
2
NVIC
IPR
register
number
3
Source module
Source description
105
89
2
106
90
2
107
91
2
108
92
2
109
93
2
110
94
2
22
Port control
module
22
Port control
module
22
Port control
module
23
—
23
—
23
Software
Pin detect (Port C)
Pin detect (Port D)
Pin detect (Port E)
—
—
Software interrupt4
1. Indicates the NVIC's interrupt source number.
2. Indicates the NVIC's ISER, ICER, ISPR, ICPR, and IABR register number used for this IRQ. The equation to calculate this
value is: IRQ div 32
3. Indicates the NVIC's IPR register number used for this IRQ. The equation to calculate this value is: IRQ div 4
4. This interrupt can only be pended or cleared via the NVIC registers.
3.2.2.3.1 Determining the bitfield and register location for configuring a
particular interrupt
Suppose you need to configure the low-power timer (LPTMR) interrupt. The following
table is an excerpt of the LPTMR row from Interrupt channel assignments.
Table 3-5. LPTMR interrupt vector assignment
Address
Vector
IRQ1
NVIC
non-IPR
register
number
2
NVIC
IPR
register
number
3
Source module
Source description
0x0000_0194
101
85
2
21
Low Power Timer —
1. Indicates the NVIC's interrupt source number.
2. Indicates the NVIC's ISER, ICER, ISPR, ICPR, and IABR register number used for this IRQ. The equation to calculate this
value is: IRQ div 32
3. Indicates the NVIC's IPR register number used for this IRQ. The equation to calculate this value is: IRQ div 4
• The NVIC registers you would use to configure the interrupt are:
• NVICISER2
• NVICICER2
• NVICISPR2
• NVICICPR2
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
77
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