L5980 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L5980' PDF : 37 Pages View PDF
Application information
Figure 14. Open loop gain: module bode diagram
L5980
The guidelines for positioning the poles and the zeroes and for calculating the component
values can be summarized as follow:
1. Choose a value for R1, usually between 1 k and 5 k, in order to have values of C4 and
C5 not comparable with parasitic capacitance of the board.
2. Choose a gain (R4/R1) in order to have the required bandwidth (BW), that means:
Equation 22
R4
=
⎛
⎝
f--Ef--L--S-C--R--⎠⎞
2
⋅
--B----W-----
fESR
⋅
-V-----S--
VIN
⋅
R1
Where fESR is the ESR zero:
Equation 23
fESR
=
---------------------1----------------------
2π ⋅ ESR ⋅ COUT
and Vs is the saw-tooth amplitude. The voltage feed forward keeps the ratio Vs/Vin constant.
3. Calculate C4 by placing the zero one decade below the output filter double pole:
Equation 24
C4
=
-------------1---0--------------
2π ⋅ R4 ⋅ fLC
4. Then calculate C3 in order to place the second pole at four times the system bandwidth
(BW):
23/37
Share Link: 
