L5985 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L5985' PDF : 36 Pages View PDF
L5985
Application informations
The guidelines for positioning the poles and the zeroes and for calculating the component
values can be summarized as follow:
1. Choose a value for R1, usually between 1k and 5k, in order to have values of C4 and
C5 not comparable with parasitic capacitance of the board.
2. Choose a gain (R4/R1) in order to have the required bandwidth (BW), that means:
Equation 22
R4
=
⎛
⎝
f--Ef--L--S-C--R--⎠⎞
2
⋅
--B----W-----
fESR
⋅
-V-----S--
VIN
⋅
R1
Where fESR is the ESR zero:
Equation 23
fESR
=
---------------------1----------------------
2π ⋅ ESR ⋅ COUT
and Vs is the saw-tooth amplitude. The voltage feed forward keeps the ratio Vs/Vin constant.
3. Calculate C4 by placing the zero one decade below the output filter double pole:
Equation 24
C4
=
-------------1---0--------------
2π ⋅ R4 ⋅ fLC
4. Then calculate C3 in order to place the second pole at four times the system bandwidth
(BW):
Equation 25
C5 = 2----π-----⋅---R-----4----⋅---C----C4----⋅-4--4-----⋅---B----W--------–----1--
For example with VOUT = 3.3V, VIN = 12V, IO = 2A, L = 15µH, COUT = 330µF, ESR = 50mΩ,
the type II compensation network is:
Equation 26
R1 = 1.1kΩ, R2 = 249Ω, R4 = 10kΩ, C4 = 68nF, C5 = 68pF
In Figure 15 is shown the module and phase of the open loop gain. The bandwidth is about
37kHz and the phase margin is 46°.
23/36
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