Application information
L5987
In Figure 15 the Bode diagram of the PWM and LC filter transfer function [GPW0 · GLC(f)]
and the open loop gain [GLOOP(f) = GPW0 · GLC(f) · GTYPEII(f)] are drawn.
Figure 15. Open loop gain: module Bode diagram
The guidelines for positioning the poles and the zeroes and for calculating the component
values can be summarized as follows:
1. Choose a value for R1, usually between 1 k and 5 k, in order to have values of C4
and C5 not comparable with parasitic capacitance of the board.
2. Choose a gain (R4/R1) in order to have the required bandwidth (BW), that means:
Equation 27
R4
=
f--Ef--L--S-C--R--
2
f--BE----SW---R--
V-V----I-SN--
R1
Where fESR is the ESR zero:
Equation 28
fESR = 2------------E----S-----R1---------C----O----U----T-
and VS is the saw-tooth amplitude. The voltage feedforward keeps the ratio VS/VIN constant.
3. Calculate C4 by placing the zero one decade below the output filter double pole:
Equation 29
C4 = 2------------R-1---0-4-------f--L--C--
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