L6228 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6228' PDF : 26 Pages View PDF
L6228
CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP
The L6228 integrates two independent Power MOS
Full Bridges. Each Power MOS has an RDS(ON) =
0.73Ω (typical value @ 25°C), with intrinsic fast free-
wheeling diode. Switching patterns are generated by
the PWM Current Controller and the Phase Se-
quence Generator (see below). Cross conduction
protection is achieved using a dead time (tDT = 1µs
typical value) between the switch off and switch on of
two Power MOSFETSs in one leg of a bridge.
Pins VSA and VSB MUST be connected together to
the supply voltage VS. The device operates with a
supply voltage in the range from 8V to 52V. It has to
be noticed that the RDS(ON) increases of some per-
cents when the supply voltage is in the range from 8V
to 12V.
Using N-Channel Power MOS for the upper transis-
tors in the bridge requires a gate drive voltage above
the power supply voltage. The bootstrapped supply
voltage VBOOT is obtained through an internal Oscil-
lator and few external components to realize a
charge pump circuit as shown in Figure 6. The oscil-
lator output (VCP) is a square wave at 600KHz (typi-
cal) with 10V amplitude. Recommended values/part
numbers for the charge pump circuit are shown in Ta-
ble 1.
LOGIC INPUTS
Pins CONTROL, HALF/FULL, CLOCK, RESET and
CW/CCW are TTL/CMOS and uC compatible logic
inputs. The internal structure is shown in Fig. 7. Typ-
ical value for turn-on and turn-off thresholds are re-
spectively Vth(ON)= 1.8V and Vth(OFF)= 1.3V.
Pin EN (Enable) has identical input structure with the
exception that the drain of the Overcurrent and ther-
mal protection MOSFET is also connected to this pin.
Due to this connection some care needs to be taken
in driving this pin. The EN input may be driven in one
of two configurations as shown in Fig. 8 or 9. If driven
by an open drain (collector) structure, a pull-up resis-
tor REN and a capacitor CEN are connected as shown
in Fig. 8. If the driver is a standard Push-Pull structure
the resistor REN and the capacitor CEN are connected
as shown in Fig. 9. The resistor REN should be cho-
sen in the range from 2.2KΩ to 180KΩ. Recommend-
ed values for REN and CEN are respectively 100KΩ
and 5.6nF. More information on selecting the values
is found in the Overcurrent Protection section.
Figure 7. Logic Inputs Internal Structure
5V
Table 1. Charge Pump External Components
Values
CBOOT
220nF
CP
10nF
RP
100Ω
D1
1N4148
D2
1N4148
Figure 6. Charge Pump Circuit
VS
D1
D2
CBOOT
RP
CP
VCP VBOOT
VSA VSB D01IN1328
ESD
PROTECTION
D01IN1329
Figure 8. EN Pin Open Collector Driving
OPEN
COLLECTOR
OUTPUT
5V
REN
EN
CEN
ESD
PROTECTION
5V
D01IN1330
Figure 9. EN Pin Push-Pull Driving
5V
PUSH-PULL
REN
EN
OUTPUT
CEN
ESD
PROTECTION
D01IN1331
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