L6256 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6256' PDF : 28 Pages View PDF
Operational Description
At power up, the regulator saturates the pass ele-
ment until 3.3V is reached. If the 5V supply rises
quickly, the regulator will current limit until 3.3V is
reached. The initial current limit level is about 1/3
of the full voltage current limit level, to limit power
dissipation in the pass element.
Once the 3.3V regulation level is reached, the
regulator mantains thi svoltage regardless of load
changes, even if the DOLPHIN goes into thermal
Charge Pump
CHARGE PUMP SPECIFICATION
Parameter
Slew Rate
RMS Current
Peak Current
Conditions
Run Mode
All Conditions
All Conditions
L6256
limit. Current limit provides a signal which also
causes UV and a POR to occur.
If the 5V input is shut down before the 12V supply
is removed, the pass element will drag down the
3.3V due to the internal diode. This prevents back
biasing effects from occuring in the chips pow-
ered by the regulator.
Rgate (see block diagram) is provided to desensi-
tize the pass element to layout problems.
In most applications it will not be needed.
Min.
Typ.
Max.
600
400
600
Unit
V/µs
mA
mA
APPLICATION NOTES AND REQUIREMENTS
Serial Port
GENERAL FORMAT REQUIREMENTS
1. Serial Port Packets must be sent without inter-
vening data. The dead space between data
bytes and after write packets addressed to
this chip must be observed.
2. Read: A turnaround delay of 1 cycle minimum
is expected on a read packet, between the ad-
dress byte (written) and the first data byte
read back. This is necessary only for data ad-
dressed directly to the combo, and is normally
satisfied by the processor port turnaround re-
quirements.
3. Write: Both bytes must be written to the serial
port in rapid succession, disabling interrupts
during the write period.
4. If the dead cycle between write packets to the
DOLPHIN is not observed, an error will also
occur. This is important at high data rates.
(see manufacturer data specs).
5. Read: same as 4.
THERMAL SHUTDOWN
The serial port becomes inoperative during ther-
mal shutdown. All data coming back is high. If
the chip receives data words in which all bits are
high, the chip is non-functional. This is invisible to
the processor when compared with the thermal
time constants and the detector hysteresis built
into the chip.
Bit 3 of all registers is dedicated to thermal shut-
down detection. If it is faster to check just a sin-
gle bit rather than using a full compare, bit 3 is
available in every read register.
NOTE: this was necessary in order to guarantee
that all FF’s would truly represent only a thermal
shutdown situation.
VCM DRIVER
Software must set the VCM gain to 12:1 before
enabling the VCM coil after spinup. A transient
will occur while the amplifier slews up to its bias
point. Allow a transient settle time of several mi-
croseconds before the VCM driver has settled to
its fully enabled state.
SPINDLE DRIVER
Brake/Park
The register bits have been carefully arranged to
allow the VCM software driver to run by looking
only at the VCM control register. A register brake
would normally be initiated by the spindle driver
routine, by setting the register brake bit in the Aux
Control Register. The Dolphin will then raise the
park delay bit in the VCM Control Register, which
the VCM driver can then use to indicate that a
park has commenced. Thus, there is no need for
the drivers to be directly linked through software
flags. The register brake bit function has been
changed to allow intermittent duty cycling during
start mode, to supply additional damping. There
are some restrictions on its use.
Back EMF Detection - Initialization
The back EMF detection in start differs from that
in run. When transitioning from start to run, the
first detected phase will always be the A negative
crossing.
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