L6258E View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6258E' PDF : 20 Pages View PDF
L6258E
In the case of VDAC equal to zero, the transconductance loop is balanced at the value of Vr, so the outputs of
the two comparators are signals having the same phase and 50% of duty cycle .
As we have already mentioned, in this situation, the two outputs OUT_A and OUT_B are simultaneously driven
from Vs to ground ; and the differential voltage across the load in this case is zero and no current flows in the
motor winding.
With a positive differential voltage on VDAC (see Fig 2, the transconductance loop will be positively unbalanced
respected Vr.
In this case being the error amplifier output voltage greater than Vr, the output of the first comparator is a square
wave with a duty cycle higher than 50%, while the output of the second comparator is a square wave with a duty
cycle lower than 50%.
The variation in duty cycle obtained at the outputs of the two comparators is the same, but one is positive and
the other is negative with respect to the 50% level.
The two driving signals, generated in this case, drive the two outputs in such a way to have switched current
flowing from OUT_A through the motor winding to OUT_B.
With a negative differential voltage VDAC, the transconductance loop will be negatively unbalanced respected Vr.
In this case the output of the first comparator is a square wave with a duty cycle lower than 50%, while the output
of the second comparator is a square wave with a duty cycle higher than 50%.
The variation in the duty cycle obtained at the outputs of the two comparators is always of the same.
The two driving signals, generated in this case, drive the the two outputs in order to have the switched current
flowing from OUT_B through the motor winding to OUT_A.
Current Control Loop Compensation
In order to have a flexible system able to drive motors with different electrical characteristics, the non inverting
input and the output of the error amplifier ( EA_OUT ) are available.
Connecting at these pins an external RC compensation network it is possible to adjust the gain and the band-
width of the current control loop.
PWM CURRENT CONTROL LOOP
Open Loop Transfer Function Analysis
Block diagram : refer to Fig. 2.
Application data:
VS = 24V
Gs transconductance gain = 1/Rb
LL = 12mH
Gin transconductance gain = 1/Ra
RL = 12Ω
Ampl. of the Tria_0_180 ref. = 1.6V (peak to peak)
RS = 0.33Ω
Ra = 40KΩ
RC = to be calculated Rb = 20KΩ
CC = to be calculated Vr = Internal reference equal to VCC/2 (Typ. 2.5V)
these data refer to a typical application, and will be used as an example during the analysis of the stability of the
current control loop.
The block diagram shows the schematics of the L6258E internal current control loop working in PWM mode; the
current into the load is a function of the input control voltage VDAC , and the relation between the two variables
is given by the following formula:
Iload · RS · GS = VDAC · Gin
10/20
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