L6460
Figure 11. Main switching regulator functional blocks
Main switching regulator
VSupply
Current Sense
Charge pump Voltage
High Side
Driver
From Central Logic
Control
Logic
Voltage
Loop Control
-
+
Regulator Freq
Regulator Ref
VSWmain_SW
La
Ra
C
VSWmain_FB
Rb
Under voltage flag
To Central Logic
Filter
-
+
Under voltage
Threshold
In pulse skipping control the duty cycle must be chosen by the user depending on supply
voltage and output regulated voltage. Therefore the switching regulator has 4 possible duty
cycles that can be changed by writing the VmainSwSelPWM bits in the MainSwCfg register
according to following Table 10.
Table 10. Main switching regulator PWM specification
MainSwCfg register
Duty cycle value
VmainSwSelPWM[1:0]
00
01
10
11
Typical
12%
15%
26%
63.5%
Comments
Default state
The output current is limited to a value that can be set by means of SelIlimit bit in the
MainSwCfg register according to following Table 11.
Table 11. Main switching regulator current limit
SelIlimit
Current limit (min)
0
3.3A
1
2.3A
Comments
Default state
Doc ID 17713 Rev 1
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