L6460 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6460' PDF : 139 Pages View PDF
Power bridges
L6460
Here after are summarized the primary features of the regulator(s):
– Synchronous rectification
– Automatic low side disabling when current in the inductance reaches 0 to optimize
efficiency at low load
– Pulse skipping control
– Internally generated PWM
– Cycle by cycle current limiting using internal current sensor
– Protected against load short circuit
– Soft start circuitry
– Under voltage signal (both continuous and latched) accessible through serial
interface.
Figure 19. Regulator block diagram
V supply
CurrentSense
Charge pump Voltage
High Side
Driver
From Central Logic
Control
Logic
Vref=3V
N.C.
N.C.
Vref= 0.8V
SelFBRef
Low Side
Driver
Regulator Freq
Regulator Ref
Voltage
Loop Control
-
+
Obtained using spare analog/digital blocks
To Central Logic
Filter
-
+
Under voltage
Threshold
Half Bridge OUT La
Bridge Sense
GPIO USED as FB
Ra
C
V out
Rb
Depending on the load current, there could be the necessity to add a Schottky diode on
output to reduce internal thermal dissipation. This diode must be placed near to the pin and
must be fast recovery and low series resistance type.
For detail about pulse skipping please refer to main switching regulator Section 13.3 on
page 54.
The output voltage will be externally set by a divider network connected on feedback pin. To
reduce as much as possible the regulation voltage error L6460 has the possibility to switch
between four regulator feedback voltage references (and, as a consequence, four under-
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Doc ID 17713 Rev 1
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