Programming manual
L6470
9.1.9
9.1.10
When the LSPD_OPT bit is set high, the low speed optimization feature is enabled and the
MIN_SPEED value indicates the speed threshold below which the compensation works. In
this case the minimum speed of the speed profile is set to zero.
An attempt to write the register when the motor is running causes the NOTPERF_CMD flag
to rise.
FS_SPD
The FS_SPD register contains the threshold speed. When the actual speed exceeds this
value, the step mode is automatically switched to full-step two-phase on. Its value is
expressed in step/tick (format unsigned fixed point 0.18) and to convert it in step/s, the
following formula can be used.
Equation 9
step/s = ---F----S----_----S----P----D--t--i--+c---k-0----.-5-----------2---–---1--8-
If the FS_SPD value is set to h3FF (max.) the system always works in microstepping mode
(SPEED must go beyond the threshold to switch to Full-step mode). Setting FS_SPD to
zero does not have the same effect as setting Step mode to full-step two-phase on: the zero
FS_SPD value is equivalent to a speed threshold of about 7.63 step/s.
The available range is from 7.63 to 15625 step/s with a resolution of 15.25 step/s.
KVAL_HOLD, KVAL_RUN, KVAL_ACC and KVAL_DEC
The KVAL_HOLD register contains the KVAL value that is assigned to the PWM modulators
when the motor is stopped (compensation excluded).
The KVAL_RUN register contains the KVAL value that is assigned to the PWM modulators
when the motor is running at constant speed (compensation excluded).
The KVAL_ACC register contains the starting KVAL value that can be assigned to the PWM
modulators during acceleration (compensation excluded).
The KVAL_DEC register contains the starting KVAL value that can be assigned to the PWM
modulators during deceleration (compensation excluded).
The available range is from 0 to 0.996 x VS with a resolution of 0.004 x VS, as shown in
Table 12.
Table 12. Voltage amplitude regulation registers
KVAL_X [7 … 0]
Output voltage
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
VS x (1/256)
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
VS x (254/256)
VS x (255/256)
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DocID16737 Rev 7