L6472PDTR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
L6472PDTR
STMicroelectronics
'L6472PDTR' PDF : 69 Pages View PDF
Programming manual
L6472
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
When when SYNC_EN bit is set low, BUSY/SYNC output is forced low during the
commands execution, otherwise, when the SYNC_EN bit is set high, the BUSY/SYNC
output provides a clock signal according to the SYNC_SEL parameter.
000
000
fFS/2
001
NA
010
NA
011
NA
100
NA
101
NA
110
NA
111
NA
Table 21. SYNC output frequency
STEP_SEL (fFS is the full-step frequency)
001
010
011
100
101
110
fFS/2
fFS
NA
NA
NA
NA
fFS/2
fFS
2 · fFS
NA
NA
NA
fFS/2
fFS
2 · fFS
4 · fFS
NA
NA
fFS/2
fFS
2 · fFS
4 · fFS
8 · fFS
NA
fFS/2
fFS
2 · fFS
4 · fFS
8 · fFS
NA
fFS/2
fFS
2 · fFS
4 · fFS
8 · fFS
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
111
fFS/2
fFS
2 · fFS
4 · fFS
8 · fFS
NA
NA
NA
The synchronization signal is obtained starting from the electrical position information
(EL_POS register) according to Table 22:
Table 22. SYNC signal source
SYNC_SEL[2 … 0]
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
1. When this value is selected the BUSY output is forced low.
Source
EL_POS[7]
EL_POS[6]
EL_POS[5]
EL_POS[4]
EL_POS[3]
UNUSED (1)
UNUSED (1)
UNUSED (1)
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DocID022729 Rev 5
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