L6566A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6566A' PDF : 52 Pages View PDF
Application information
L6566A
Figure 12. Addition of an offset to the current sense lowers the burst-mode
operation threshold
Vcso
=
Vref
R
R
+ Rc
Vref
10
4
L6566A
37
Rc
R
Rs
5.4
Adaptive UVLO
A major problem when optimizing a converter for minimum no-load consumption is that the
voltage generated by the auxiliary winding under these conditions falls considerably as
compared even to few mA load. This very often causes the supply voltage Vcc of the control
IC to drop and go below the UVLO threshold so that the operation becomes intermittent,
which is undesired. Furthermore, this must be traded off against the need of generating a
voltage not exceeding the maximum allowed by the control IC at full load.
To help the designer overcome this problem, the device, besides reducing its own
consumption during burst-mode operation, also features a proprietary adaptive UVLO
function. It consists of shifting the UVLO threshold downwards at light load, namely when
the voltage at the COMP pin falls below a threshold VCOMPO internally fixed (see
Section 5.8), so as to have more headroom. To prevent any malfunction during transients
from minimum to maximum load, the normal (higher) UVLO threshold is re-established
when the voltage at the COMP pin exceeds VCOMPL (see Section 5.8) and Vcc has
exceeded the normal UVLO threshold (see Figure 13). The normal UVLO threshold ensures
that at full load the MOSFET is driven with a proper gate-to-source voltage.
Figure 13. Adaptive UVLO block
Vcc_PFC
6
Vcc_PFC
logic
Vcc
5
VCOMP
(pin 9)
VC OMPL
VC OMPO
Vcc
t
(pin 5)
COMP 9
R
S
Q
UVLO
VccOFF1
VccOFF2
VCOMPL
SW
VCOMPO
VccOFF1
VccOFF2
Q
t
(*)
L6566A
(*) VccOFF2 < VccOFF1 is selected when Q is high
Vcc_PFC
t
(pin 6)
Tdelay
t
24/52
Doc ID 13794 Rev 4
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