L6566ATR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6566ATR' PDF : 51 Pages View PDF
Application information
L6566A
Equation 6
( ) kopt = 3 ⋅ Vinmin ⋅ Vinmax +
VR
Vinmin + Vinmax
⋅ VR
Experience shows that this value is typically lower than the real one. Once the maximum
peak primary current, IPKpmax, occurring at minimum input voltage Vinmin has been found,
the value of Rs can be determined from (2):
Equation 7
Rs
=
1−
k opt
3
Vin min
IPKp max
The converter is then bench tested to find the output power level Poutlim where regulation is
lost (because overcurrent is being tripped) both at Vin = Vinmin and Vin = Vinmax.
Figure 17. Left: overcurrent setpoint vs. VFF voltage; right: line feedforward function block
Vcsx [V]
1.2
1
VCOMP= Upper clamp
PFC Output Bus
To PFC's OV
R1A
sensing
R1B
Optional for
OVP settings
0.8
0.6
0.4
0.2
0
0
0.5
1
1.5
2
2.5
3
3.5
VVFF [V]
R2
COMP
9
VFF
CS
15
7
VOLTAGE
FEED
FORWARD
Vcsx
L6566A
1.5 V
Rs
PWM
OCP
Hiccup
R
Q
S
DRIVER
Clock/ZCD
DISABLE
4
GD
If Poutlim @ Vinmax > Poutlim @ Vinmin the system is still undercompensated and k needs to
increase; if Poutlim @ Vinmax < Poutlim @ Vinmin the system is overcompensated and k
needs to decrease. This continues until the difference between the two values is acceptably
low. Once the true kopt is found in this way, it is possible that Poutlim turns out slightly
different from the target; to correct this, the sense resistor Rs needs adjusting and the above
tuning process is repeated with the new Rs value. Typically, a satisfactory setting is achieved
in no more than a couple of iterations.
In applications where this function is not wanted, e.g. because the PFC stage regulates at a
fixed voltage, the VFF pin can be simply grounded, directly or through a resistor, depending
on whether one wants the OVP function to be auto-restart or latched mode (see
Section 5.11). The overcurrent setpoint is then fixed at the maximum value of 1 V. If a lower
setpoint is desired to reduce the power dissipation on Rs, the pin can be also biased at a
fixed voltage using a divider from VREF (pin 10).
28/52
Doc ID 13794 Rev 4
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