L6566ATR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6566ATR' PDF : 51 Pages View PDF
L6566A
Application information
Note:
The ZCD pin is connected to the auxiliary winding through a resistor divider RZ1, RZ2 (see
Figure 8). The divider ratio kOVP = RZ2 / (RZ1 + RZ2) is chosen equal to:
Equation 10
k OVP
=
5
Vout OVP
Ns
Naux
where VoutOVP is the output voltage value that is to activate the protection, Ns is the turn
number of the secondary winding and Naux is the turn number of the auxiliary winding. The
value of RZ1 is such that the current sourced by the ZCD pin be within the rated capability of
the internal clamp:
Equation 11
R Z1
≥
1
3 ⋅ 10 −3
Naux
Np
Vin max
where Vinmax is the maximum DC input voltage and Ns the turn number of the primary
winding. See Section 5.2 for additional details.
To reduce sensitivity to noise and prevent the latch from being erroneously activated, first
the OVP comparator is active only for a small time window (typically, 0.5 µs), starting 2 µs
after MOSFET turn-off, to reject the voltage spike associated to the positive-going edges of
the voltage across the auxiliary winding Vaux; secondly, to stop the L6566A, the OVP
comparator must be triggered for four consecutive switching cycles. A counter, which is
reset every time the OVP comparator is not triggered in one switching cycle, is provided for
this purpose.
Figure 22 shows the internal block diagram, while the timing diagrams in Figure 23 illustrate
the operation.
To use the OVP function effectively, i.e. to ensure that the OVP comparator is always
interrogated during MOSFET OFF-time, the duty cycle D under open-loop conditions must
fulfill the following inequality:
Equation 12
D + TBLANK2 fsw ≤ 1
where TBLANK2 = 2 µs; this is also illustrated in the diagram of Figure 24.
Doc ID 13794 Rev 4
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