Configuring the device
8
Configuring the device
L6713A
Number of phases and multiple DACs need to be configured before the system starts-up by
programming the apposite pin PHASE_SEL and SS/LTBG/AMD pin.
The configuration of this pin identifies two main working areas (See Table 12) distinguishing
between compliancy with Intel VR10,VR11 or AMD 6BIT specifications. According to the
main specification considered, further customizations can be done: main differences are
regarding the DAC table, soft-start implementation, protection management and Dynamic
VID Transitions. See Table 13 and See Table 14 for further details about the device
configuration.
8.1
Number of phases selection
L6713A allows to select between two and three phase operation simply using the
PHASE_SEL pin, as shown in the following table.
Table 11. Number of phases setting
PHASE_SEL pin
Number of phases
Floating
2-PHASE
Short to SGND
3-PHASE
Phases used
Phase1, Phase3
Phase1, Phase2, Phase3
8.2
Note:
28/64
DAC selection
L6713A embeds a selectable DAC (through SS/LTBG/AMD pin, See Table 12) that allows to
regulate the output voltage with a tolerance of ±0.5% (±0.6% for AMD DAC) recovering from
offsets and manufacturing variations. In case of selecting Intel mode, the device
automatically introduces a -19 mV (both VRD10.x and VR11) offset to the regulated voltage
in order to avoid any external offset circuitry to worsen the guaranteed accuracy and, as a
consequence, the calculated system TOB.
Table 12. DAC settings (See note)
SS / LTBG / AMD
Resistor (RSSOSC)
vs. SGND
DAC
Soft-start time
LTB™ gain
OVP
0 (Short)
AMD
Not
programmable
Fixed
(LTB™ gain = 2)
1.800 V (typ)
or
Programmable
UVP
-750 mV
(typ)
> 2.4 kΩ
Intel
Programmable
trough RSSOSC
Programmable
trough RSSOSC
(LTB™ gain ≤ 2)
VID + 175 mV
(typ)
or
programmable
-750 mV
(typ)
When selecting Intel mode, SS/LTBG/AMD pin is used to select both soft-start time and
LTB™ gain (see dedicated sections).