L6911E
Figure 4. Soft start
Vcc
Vin
Vss
to GND
LGATE
Vcc Turn-on threshold
Vin Turn-on threshold
1V
0.5V
Vout
Device description
Timing diagram
Aquisition: CH1 = PHASE; CH2 = VOUT;
CH3 = PGOOD; CH4 = VSS
CH3 = PGOOD; CH4 = VSS
5.4
Driver section
The driver capability on the high and low side drivers allows to use different types of power
MOS (also multiple MOS to reduce the Rds(ON)), maintaining fast switching transition.
The low-side mos driver is supplied directly by Vcc while the high-side driver is supplied by
the BOOT pin.
Adaptative dead time control is implemented to prevent cross-conduction and allow to use
many kinds of mosfets. The upper mos turn-on is avoided if the lower gate is over about
200mV while the lower mos turn-on is avoided if the PHASE pin is over about 500mV. The
upper mos is in any case turned-on after 200nS from the low side turn-off.
The peak current is shown for both the upper (Figure 5 on page 14) and the lowr (Figure 6
on page 14) driver at 5V and 12V. a 4nF capacitive load has been used in these
measurements.
For the lower driver, the source peak current is 1.1A @ VCC = 12V and 500mA @ VCC = 5V,
and the sink peak current is 1.3A @ VCC = 12V and 500mA @ VCC = 5V.
Similary, for the upper driver, the source peak current is 1.3A @ Vboot-Vphase = 12V and
600mA @ Vboot-Vphase = 5V, and the sink peak current is 1.3A @ Vboot-Vphase = 12V
and 550mA @ Vboot-Vphase = 5V.
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