L6928 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6928' PDF : 16 Pages View PDF
Pin configuration
L6928
2
Pin configuration
Figure 2: Pin connections (top view)
RUN
COMP
VFB
GND
Pin
1
2
3
4
5
6
7
8
-
1
8
2
7
3
6
4
5
D01IN1239AMOD
Name
RUN
COMP
VFB
GND
LX
VCC
SYNC
PGOOD
E-pad
PGOOD
SYNC
VCC
LX
RUN 1
COMP 2
VFB 3
GND 4
E-pad
8 PGOOD
7 SYNC
6 VCC
5 LX
GIPG100420151039LM
Table 2: Pin description
Description
Shutdown input. When connected to a low level (lower than
0.4 V) the device stops working. When high (higher than 1.3
V) the device is enabled
Error amplifier output. A compensation network has to be
connected to this pin. The loop stability usually is well-
guaranteed by a 220 pF capacitor
Error amplifier inverting input. The output voltage can be
adjusted from 0.6 V up to the input voltage by connecting
this pin to an external resistor divider
Ground
Switch output node. This pin is internally connected to the
drain of the internal switches
Input voltage. The start-up input voltage is 2.2 V (typ.) while
the operating input voltage range is from 2 V to 5.5 V. An
internal UVLO circuit realizes a 100 mV (typ.) hysteresis
Operating mode selector input. When high (higher than 1.3
V) the low consumption mode is selected. When low (lower
than 0.5 V) the low noise mode is selected. If connected with
an appropriate external synchronization signal (from 1 MHz
up to 2 MHz) the internal synchronization circuit is active and
the device works at the same switching frequency
Power Good comparator output. It is an open drain output. A
pull-up resistor should be connected between PGOOD and
VOUT (or VCC depending on the requirements). The pin is
forced low when the output voltage is lower than 90% of the
regulated output voltage and goes high when the output
voltage is greater than 90% of the regulated output voltage.
If it is not used the pin can be left floating
To be connected to GND plane for optimal thermal
performance
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DocID11051 Rev 9
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