Table 23. Truth table
Control pins
Control bits
Failure bits
Output pins
SPI DO
N°
EN DIR PWM TS/ACT_OFF FW FW_PAS CP_LOW OV UV SC TSD WDTO GH1 GL1 GH2 GL2 GL_ER
Comment
10X X
21X X
31X X
41X X
51X X
61X X
71X X
81X X
91X X
10 1 X X
11 1 0 1
12 1 X 0
13 1 0 0
14 1 1 0
15 1 1 1
16 1 X 0
17 1 0 0
18 1 1 0
X
X
X
X
X X X X X RL RL RL RL T Standby mode
X
X
X
X
X X X X X RL RL RL RL 1 Power-on reset
0
X
0
0
000 0
0
LLLL
0
EXT_TS = 1 (external thermal
shutdown)
0
X
0
0
000 0
0
LLLL
0 EXT_TS = 0 (active Off)
1
X
X
1
0 0 0 0 0 RL RL RL RL 1 Charge pump voltage too low
1
X
X
0
0 0 0 1 0 RL RL RL RL 1 Internal thermal shutdown
1
X
X
0
100 0
0
LLLL
1 Overvoltage
1
X
X
0
010 0
0
LLLL
1 Undervoltage
1
X
X
0
001 0
0
L(1) L(1) L(1) L(1)
0 Short-circuit(1)
1
X
X
0
000 0
1
LLLL
1 Watchdog time out
1
X
X
0
000 0
0
L HH L
0
-
1
0
0
0
000 0
0
LHLH
0 Act. free wheeling mode LS
1
0
1
0
000 0
0
LHL L
0 Pass. free wheeling mode LS
1
0
1
0
000 0
0
L L LH
0 Pass. free wheeling mode LS
1
X
X
0
000 0 0 H L L H
0
-
1
1
0
0
000 0 0 H L H L
0 Act. free wheeling mode HS
1
1
1
0
000 0
0
L LHL
0 Pass. free wheeling mode HS
1
1
1
0
000 0 0 H L L L
0 Pass. free wheeling mode HS
1. Only the halfbridge (low-side and high-side) where one MOSFET is in short-circuit condition is switched-off. Both MOSFET’S of the other halfbridge remain active and
driven by DIR and PWM.