LAN8720AI-CP View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
LAN8720AI-CP
SMSC -> Microchip
'LAN8720AI-CP' PDF : 79 Pages View PDF
Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
3.1.2.8
3.1.2.9
3.1.3
3.1.3.1
3.1.3.2
3.1.3.3
Receiver Errors
During a frame, unexpected code-groups are considered receive errors. Expected code groups are the
DATA set (0 through F), and the /T/R/ (ESD) symbol pair. When a receive error occurs, the RXER
signal is asserted and arbitrary data is driven onto the RXD[1:0] lines. Should an error be detected
during the time that the /J/K/ delimiter is being decoded (bad SSD error), RXER is asserted true and
the value ‘1110’ is driven onto the RXD[1:0] lines. Note that the Valid Data signal is not yet asserted
when the bad SSD error occurs.
100M Receive Data Across the RMII Interface
The 2-bit data nibbles are sent to the RMII block. These data nibbles are clocked to the controller at
a rate of 50MHz. The controller samples the data on the rising edge of XTAL1/CLKIN (REF_CLK). To
ensure that the setup and hold requirements are met, the nibbles are clocked out of the transceiver
on the falling edge of XTAL1/CLKIN (REF_CLK).
10BASE-T Transmit
Data to be transmitted comes from the MAC layer controller. The 10BASE-T transmitter receives 4-bit
nibbles from the MII at a rate of 2.5MHz and converts them to a 10Mbps serial data stream. The data
stream is then Manchester-encoded and sent to the analog transmitter, which drives a signal onto the
twisted pair via the external magnetics.
The 10M transmitter uses the following blocks:
MII (digital)
TX 10M (digital)
10M Transmitter (analog)
10M PLL (analog)
10M Transmit Data Across the RMII Interface
The MAC controller drives the transmit data onto the TXD bus. TXD[1:0] shall transition synchronously
with respect to REF_CLK. When TXEN is asserted, TXD[1:0] are accepted for transmission by the
device. TXD[1:0] shall be “00” to indicate idle when TXEN is deasserted. Values of TXD[1:0] other than
“00” when TXEN is deasserted are reserved for out-of-band signalling (to be defined). Values other
than “00” on TXD[1:0] while TXEN is deasserted shall be ignored by the device.TXD[1:0] shall provide
valid data for each REF_CLK period while TXEN is asserted.
In order to comply with legacy 10BASE-T MAC/Controllers, in half-duplex mode the transceiver loops
back the transmitted data, on the receive path. This does not confuse the MAC/Controller since the
COL signal is not asserted during this time. The transceiver also supports the SQE (Heartbeat) signal.
Manchester Encoding
The 4-bit wide data is sent to the 10M TX block. The nibbles are converted to a 10Mbps serial NRZI
data stream. The 10M PLL locks onto the external clock or internal oscillator and produces a 20MHz
clock. This is used to Manchester encode the NRZ data stream. When no data is being transmitted
(TXEN is low), the 10M TX block outputs Normal Link Pulses (NLPs) to maintain communications with
the remote link partner.
10M Transmit Drivers
The Manchester encoded data is sent to the analog transmitter where it is shaped and filtered before
being driven out as a differential signal across the TXP and TXN outputs.
Revision 1.4 (08-23-12)
22
DATASHEET
SMSC LAN8720A/LAN8720Ai
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