LF3310 View Datasheet(PDF) - LOGIC Devices
Part Name
Description
MFG CO.
'LF3310' PDF : 21 Pages View PDF
DEVICES INCORPORATED
LF3310
Horizontal / Vertical Digital Image Filter
FIGURE 12. COEFFICIENT BANK LOADING SEQUENCE
COEFFICIENT SET 1
COEFFICIENT SET 2
COEFFICIENT SET 3
CLK
HLD/VLD
HCF/VCF11-0
ADDR1 COEF0
W1
COEF7 ADDR2 COEF0
W1: Coefficient Set 1 written to coefficient banks during this clock cycle.
W2: Coefficient Set 2 written to coefficient banks during this clock cycle.
W3: Coefficient Set 3 written to coefficient banks during this clock cycle.
W2
COEF7 ADDR3 COEF0
W3
COEF7
FIGURE 13. CONFIGURATION/CONTROL REGISTER LOADING SEQUENCE
CONFIG REG SELECT REG
ROUND REGISTER
LIMIT REGISTER
CLK
HLD/VLD
HCF/VCF11-0
W1
W2
W3
W4
ADDR1 DATA1 ADDR2 DATA1 ADDR3 DATA1 DATA2 DATA3 DATA4 ADDR4 DATA1 DATA2
W1: Configuration Register loaded with new data on this rising clock edge.
W2: Select Register loaded with new data on this rising clock edge.
W3: Round Register loaded with new data on this rising clock edge.
W4: Limit Register loaded with new data on this rising clock edge.
Coefficient Banks
The coefficient banks store the
coefficients which feed into the
multipliers in the horizontal and
vertical filters. There is a separate
bank for each multiplier. Each bank
can hold 256 12-bit coefficients. The
banks are loaded using an LF
InterfaceTM. There is a separate LF
InterfaceTM for the horizontal and
vertical banks. Coefficient bank
loading is discussed in the LF
InterfaceTM section.
Configuration and Control Registers
The Configuration Registers deter-
mine how the HV Filter operates.
Tables 2 through 7 show the formats
of the six configuration registers.
There are three types of control
registers: round, select, and limit.
There are sixteen round registers for
the horizontal filter and sixteen for the
vertical filter. Each register is 32-bits
wide. HRSL3-0 and VRSL3-0 determine
which horizontal and vertical round
registers respectively are used for
rounding.
There are sixteen select registers for
the horizontal filter and sixteen for
the vertical filter. Each register is
5-bits wide. HRSL3-0 and VRSL3-0
determine which horizontal and
vertical select registers respectively
are used in the select circuitry.
There are sixteen limit registers for
the horizontal filter and sixteen for
the vertical filter. Each register is
24-bits wide and stores both an upper
and lower limit value. The lower
limit is stored in bits 11-0 and the
upper limit is stored in bits 23-12.
HRSL3-0 and VRSL3-0 determine
which horizontal and vertical limit
registers respectively are used for
limiting when limiting is enabled.
Configuration and Control Register
loading is discussed in the LF
InterfaceTM section.
LF InterfaceTM
The Horizontal and Vertical
LF InterfacesTM are used to load data
into the horizontal and vertical
coefficient banks respectively. They
are also used to load data into the
Configuration and Control Registers.
The following section describes how
the Horizontal LF InterfaceTM works.
The Horizontal and Vertical
LF InterfacesTM are identical in
function. If HLD and HCF11-0 are
replaced with VLD and VCF11-0, the
following section will describe how
the Vertical LF InterfaceTM works.
HLD is used to enable and disable the
Horizontal LF InterfaceTM. When
Video Imaging Products
12
11/08/2001-LDS.3310-H
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