LH28F008SCB-L170 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LH28F008SCB-L170' PDF : 55 Pages View PDF
sharp
LHF08CH1
38
6.2.7 RESET OPERATIONS
VOH
RY/BY#(R)
VOL
VIH
RP#(P)
VIL
tPLPH
(A)Reset During Read Array Mode
VOH
RY/BY#(R)
VOL
VIH
RP#(P)
VIL
tPLRH
tPLPH
(B)Reset During Block Erase, Byte Write, or Lock-Bit Configuretion
2.7V/3.3V/5V
VCC
VIL
VIH
RP#(P)
VIL
t235VPH
(C)RP# rising Timing
Figure 18. AC Waveform for Reset Operation
Reset AC Specifications
Sym.
Parameter
VCC=2.7V
Notes Min. Max.
VCC=3.3V
Min. Max.
VCC=5V
Min. Max. Unit
RP# Pulse Low Time
tPLPH (If RP# is tied to VCC, this
100
100
100
ns
specification is not applicable)
RP# Low to Reset during
tPLRH Block Erase, Byte Write or
1,2

20
12
µs
Lock-Bit Configuration
VCC 2.7V to RP# High
t235VPH VCC 3.0V to RP# High
3
100
100
100
ns
VCC 4.5V to RP# High
NOTES:
1. If RP# is asserted while a block erase, byte write, or lock-bit configuration operation is not executing, the reset
will complete within 100ns.
2. A reset time, tPHQV, is required from the latter of RY/BY# or RP# going high until outputs are valid.
3. When the device power-up, holding RP# low minimum 100ns is required after VCC has been in predefined range
and also has been in stable there.
Rev. 1.3
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