LH28F008SC-V/SCH-V
6.2.5 AC CHARACTERISTICS - WRITE OPERATION (NOTE 1)
• VCC = 5.0±0.25 V, 5.0±0.5 V, TA = 0 to +70˚C or –25 to +85˚C
VERSIONS
(NOTE 5)
VCC±0.25 V LH28F008SC-V85/
LH28F008SCH-V85
VCC±0.5 V
(NOTE 6)
(NOTE 6)
UNIT
LH28F008SC-V85/ LH28F008SC-V12/
LH28F008SCH-V85 LH28F008SCH-V12
SYMBOL
PARAMETER
NOTE
tAVAV Write Cycle Time
RP# High Recovery to WE#
tPHWL
2
Going Low
tELWL CE# Setup to WE# Going Low
tWLWH WE# Pulse Width
tPHHWH RP# VHH Setup to WE# Going High 2
tVPWH VPP Setup to WE# Going High
2
tAVWH Address Setup to WE# Going High 3
tDVWH Data Setup to WE# Going High 3
tWHDX Data Hold from WE# High
tWHAX Address Hold from WE# High
tWHEH CE# Hold from WE# High
tWHWL WE# Pulse Width High
tWHRL WE# High to RY/BY# Going Low
tWHGL Write Recovery before Read
VPP Hold from Valid SRD,
tQVVL
2, 4
RY/BY# High
RP# VHH Hold from Valid SRD,
tQVPH
2, 4
RY/BY# High
MIN.
85
1
10
40
100
100
40
40
5
5
10
30
0
0
0
MAX.
90
MIN.
90
1
10
40
100
100
40
40
5
5
10
30
0
0
0
MAX.
90
MIN.
120
1
10
40
100
100
40
40
5
5
10
30
0
0
0
MAX.
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
90 ns
ns
ns
ns
NOTES :
1. Read timing characteristics during block erase, byte write
and lock-bit configuration operations are the same as
during read-only operations. Refer to Section 6.2.4 "AC
CHARACTERISTICS" for read-only operations.
2. Sampled, not 100% tested.
3. Refer to Table 3 for valid AIN and DIN for block erase,
byte write, or lock-bit configuration.
4. VPP should be held at VPPH1/2 (and if necessary RP#
should be held at VHH) until determination of block erase,
byte write, or lock-bit configuration success (SR.1/3/4/5 = 0).
5. See Fig. 9 "Transient Input/Output Reference
Waveform" and Fig. 11 "Transient Equivalent Testing
Load Circuit" (High Seed Configuration) for testing
characteristics.
6. See Fig. 10 "Transient Input/Output Reference
Waveform" and Fig. 11 "Transient Equivalent Testing
Load Circuit" (Standard Configuration) for testing
characteristics.
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