CMOS 4M (256 × 16) Pseudo-Static RAM
VCC
3.0 V
VR
RFSH
VIH
VIL
CE VIH
VIL
CS
VIH
VIL
tRFD
tFP
tFS
tR
DATA RETENTION PERIOD
tFRS
RFSH ≤ 0.2 V
CE ≥ VCC -0.2 V
CS ≥ VCC -0.2 V
NOTE: Ao - A17, UWE, LWE and OE = Don't Care
Figure 11. Data Retention Mode
LH5PV16256
5PV16256S-10
CE
VIH
VIL
CS VIH
VIL
tP
tCSS
tCSH
tRC
tCE
RFSH
VIH
VIL
I/O0 - I/O15
VOH
VOL
OPEN
NOTE: A0 - A17, UWE, LWE and OE = Don't Care
Figure 12. CS Standby Mode
tP
tRFD
5PV16256S-11
13