LH6V4256
CMOS 1M (256K × 4) Dynamic RAM
tRC
tRAS
tRP
RAS
VIH
VIL
A0 - A8
VIH
VIL
tASR tRAH
ROW
ADDRESS
NOTE: CAS = 'H,' WE, OE = Don't Care
Figure 13. RAS Only Refresh Cycle
6V4256-14
VIH
RAS VIL
VIH
CAS VIL
tRC
tRAS
tCSR
tCHR
tRPCN
tRP
tRPCP
NOTE: WE, OE, A0 - A8 = Don't Care
Figure 14. CAS Before RAS Refresh Cycle
6V4256-15
2-28