SHARI=
.-
_-
.i
c start 1
r
f
I
Full Status
Check if Desired
LHFlGKA7
22
Bus
OpWlOâ€
wlite
Command
Read Status
Register
Data7OH
Add-X
Comments
Read
Status Register Data
Standby
write
write
Full Chip Erase
SbJP
Full Chip Ease
Confin
Chedt SR.7
l.WSM Ready
OIWSM Busy
Data=3OH
Addr-X
Data-DOH
Ad&X
Read
Status Regtster Data
standby
Check SR.7
l=WSM Ready
OIWSM Busy
Full stams check can be done after each full chip erase.
Write FFH after tie last operation to place device in read army mode.
FIJU STATUS CHECK PROCEDURE
Command Sequence
Error
Bus
OpedfOâ€
Standby
Command
Commenb
Check SR.3
l=Vpp Enor Detect
Standby
Standby-
Check SR.4,5
Both l=Ccmmand Sequence Error
Check SR.5
l=Full Chip Erase Error
SRS,SR.4,SR.3 and SR.l am only dewed by the Clear Status
Register Command in cases whew multiple blocks are erased
before full status is chedmd.
If error is detected, clear the Status Register before attempting
retry or other error recovery.
Figure 6. Automated Full Chip Erase Flowchart
L-
Rev. 1.9