SHARP
SPEC No.
LC99204
YODEL No.
LM3201921
PAGE
18
6-2 Display face configuration
The display consists of 32Cx240
driven at l/240 duty ratio.
dots as shown in Fig. 1. The interface
is tc be
6-3 Input Data and Control Signal
The LCD driver is 80 bits LSI. consisting of shift registers.
latch circuits and
LCD driver circuits.
Input data for each row (320 dot) will be sequentially
transferred
in the form of 4 bit parallel data through shift registers from top left
of the display together with clock signal XP2:.
When input of one row (320 dots) is completed. the data will be latched in the form
of parallel data corresponding to the signal electrodes by the falling edge of latch
signal KPl). Then. the corresponding drive signals will be transmitted to the 320
lines of column electrodes of the LCD panel by the LCD drive circuits.
At this time. scan start-up signal X has been transferred
from the scan signal
driver to the 1st row of scan electrodes. and the contents of the data signals are
displayed on the 1st row of the display face according to the combinations of
voltages applied to the scan and signal electrodes of the LCD. While the data of 1st
row are being displayed. the data of 2nd row are entered. When data for 320 dots have
been transferred,
they will be latched by the falling edge of LP. switching the
display to the 2nd row.
Such data input will be repeated up to the 240th row of each display segment. from
upper row to lower rows. to complete one frame of display by time sharing method.
S generates scan signal to drive hor izontal electrodes.
Since DC voltage. if applied to LCD panel. causes chemical reaction in LC materials.
causing deterioration
of the material s. drive wave-form shall be inverted at every
display frame tc prevent the generat on of such DC voltage. Control Signal M plays
such a role.