LOUIS View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'LOUIS' PDF : 18 Pages View PDF
ST5481
A 2.2µF decoupling polarized capacitor (tantal or chemical) is necessary as between VREGA and GNDA.
A 1µF decoupling polarized capacitor (tantal or chemical) is necessary as between VREGD1 and
GNDD1.
A 1µF decoupling polarized capacitor (tantal or chemical) is necessary as between VREGD2 and
GNDD2.
Table 6 : Digital Pins (except GPIO4 to GPIO7,XTALin, XTALout, RPSM, NRESET)
Symbol
Parameter
VIL
VIH
VOL
VOH
ILEAK
IOL
IOH
VHYST
CIN
Low level input voltage
High level input voltage
Low level input voltage (ILoad = 2mA)
High Level Output Voltage (Iload = -2mA)
Input Leakage Current
Low level input Current (0<Vol<Volmax)
High Level Output Current (Vohmin<Vof<VregD1)
Schmitt Trigger Hysteresis
Input Capacitance
Minimum Typical Maximum Unit
0.8VRegD1
0.2VRegD1 V
V
0.4
V
0.85VRegD1
V
1
uA
-2
mA
2
mA
0.8
V
3
pF
Table 7 : GPIO4, GPIO5, GPIO6, GPIO7.
Symbol
VIL
VIH
VOL
VOH
ILEAK
IOL
IOH
VHYST
CIN
Parameter
Low level input voltage
High level input voltage
Low level input voltage (Iload = 2mA)
High Level Output Voltage (Iload = -2mA)
Input Leakage Current
Low level input Current (0<Vol<Volmax)
High Level Output Current (Vohmin<Vof<VregD1)
Schmitt Trigger Hysteresis
Input Capacitance
Minimum Typical Maximum Unit
0.8VRegD1
0.2VRegD1 V
V
0.4
V
0.85VRegD1
V
1
uA
-4
mA
4
mA
0.8
V
3
pF
Table 8 : RPSM, NRESET.(5 volt inputs compatible)
Symbol
VIL
VIH
VHYST
Parameter
Low level input voltage
High level input voltage
Schmitt Trigger Hysteresis
Minimum
0.7VBUS
1
Typical
1.3
Maximum Unit
0.3VBUS
V
V
V
Note A 10ms time constant will be used (ex: 470 nF, 20Ω) to generate an adequate pulse on NRESET pin.
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