LPC47B272-MS View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
'LPC47B272-MS' PDF : 195 Pages View PDF
DRIVE RATE
DATA RATE
DATA RATE
DRT1 DRT0 SEL1 SEL0 MFM FM
1
0
0
0
500
250
1
0
0
1
2Meg
---
1
0
1
0
250
125
DENSEL
1
0
0
DRATE(1)
1
0
0
0
0
1
1
0
Drive Rate Table (Recommended) 00 = 360K, 1.2M, 720K, 1.44M and 2.88M Vertical Format
01 = 3-Mode Drive
10 = 2 Meg Tape
Note 1: The DRATE and DENSEL values are mapped onto the DRVDEN pins.
DT1 DT0
0
0
1
0
0
1
1
1
Table 9 - DRVDEN Mapping
DRVDEN1 (1)
DRVDEN0 (1)
DRIVE TYPE
DRATE0
DENSEL
4/2/1 MB 3.5"
2/1 MB 5.25" FDDS
2/1.6/1 MB 3.5" (3-MODE)
DRATE0
DRATE1
DRATE0
nDENSEL PS/2
DRATE1
DRATE0
Table 10 - Default Precompensation Delays
PRECOMPENSATION
DATA RATE
DELAYS
2 Mbps
20.8 ns
1 Mbps
41.67 ns
500 Kbps
125 ns
300 Kbps
125 ns
250 Kbps
125 ns
MAIN STATUS REGISTER
Address 3F4 READ ONLY
The Main Status Register is a read-only register and indicates the status of the disk controller. The Main Status Register
can be read at any time. The MSR indicates when the disk controller is ready to receive data via the Data Register. It
should be read before each byte transferring to or from the data register except in DMA mode. No delay is required
when reading the MSR after a data transfer.
7
6
5
4
3
2
1
0
NON
CMD
DRV1 DRV0
RQM
DIO
DMA BUSY Reserved Reserved BUSY BUSY
BIT 0 - 1 DRV x BUSY
These bits are set to 1s when a drive is in the seek portion of a command, including implied and overlapped seeks and
recalibrates.
BIT 4 COMMAND BUSY
This bit is set to a 1 when a command is in progress. This bit will go active after the command byte has been accepted
and goes inactive at the end of the results phase. If there is no result phase (Seek, Recalibrate commands), this bit is
returned to a 0 after the last command byte.
BIT 5 NON-DMA
Reserved, read ‘0’. This part does not support non-DMA mode.
BIT 6 DIO
Indicates the direction of a data transfer once a RQM is set. A 1 indicates a read and a 0 indicates a write is required.
BIT 7 RQM
Indicates that the host can transfer data if set to a 1. No access is permitted if set to a 0.
SMSC LPC47B27x
- 28 -
DATASHEET
Rev. 04-17-07
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