LPC47B27X View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

MFG CO.

LPC47B27X

100 Pin Enhanced Super I/O Controller with LPC Interface

SMSC -> Microchip 

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PARALLEL PORT

The LPC47B27x incorporates an IBM XT/AT compatible parallel port. This supports the optional PS/2

type bi-directional parallel port (SPP), the Enhanced Parallel Port (EPP) and the Extended Capabilities

Port (ECP) parallel port modes. Refer to the Configuration Registers for information on disabling, power

down, changing the base address of the parallel port, and selecting the mode of operation.

The LPC47B27x also provides a mode for support of the floppy disk controller on the parallel port.

The parallel port also incorporates SMSC's ChiProtect circuitry, which prevents possible damage to the

parallel port due to printer power-up.

The functionality of the Parallel Port is achieved through the use of eight addressable ports, with their

associated registers and control gating. The control and data port are read/write by the CPU, the status

port is read/write in the EPP mode. The address map of the Parallel Port is shown below:

DATA PORT

STATUS PORT

CONTROL PORT

EPP ADDR PORT

BASE ADDRESS + 00H

BASE ADDRESS + 01H

BASE ADDRESS + 02H

BASE ADDRESS + 03H

EPP DATA PORT 0

EPP DATA PORT 1

EPP DATA PORT 2

EPP DATA PORT 3

BASE ADDRESS + 04H

BASE ADDRESS + 05H

BASE ADDRESS + 06H

BASE ADDRESS + 07H

The bit map of these registers is:

DATA PORT

STATUS PORT

CONTROL

PORT

EPP ADDR

PORT

EPP DATA

PORT 0

EPP DATA

PORT 1

EPP DATA

PORT 2

EPP DATA

PORT 3

D0

PD0

TMOUT

STROBE

PD0

PD0

PD0

PD0

PD0

D1

PD1

0

AUTOFD

PD1

PD1

PD1

PD1

PD1

D2

PD2

0

nINIT

PD2

PD2

PD2

PD2

PD2

D3

PD3

nERR

SLC

PD3

PD3

PD3

PD3

PD3

D4

PD4

SLCT

IRQE

PD4

PD4

PD4

PD4

PD4

D5

PD5

PE

PCD

PD5

PD5

PD5

PD5

PD5

D6

PD6

nACK

0

PD6

PD6

PD6

PD6

PD6

D7

PD7

nBUSY

0

Note

1

1

1

PD7

2

PD7

2

PD7

2

PD7

2

PD7

2

Note 1: These registers are available in all modes.

Note 2: These registers are only available in EPP mode.

HOST

CONNECTOR

1

2-9

10

11

12

13

14

15

16

17

Table 39 - Parallel Port Connector

PIN NUMBER

83

68-75

80

79

78

STANDARD

nStrobe

PD<0:7>

nAck

Busy

PE

EPP

nWrite

PData<0:7>

Intr

nWait

(User Defined)

77

SLCT

82

nALF

(User Defined)

nDatastb

81

nError

(User Defined)

66

nInit

nRESET

67

nSLCTIN

nAddrstrb

ECP

nStrobe

PData<0:7>

nAck

Busy, PeriphAck(3)

PError,

nAckReverse(3)

Select

nAutoFd,

HostAck(3)

nFault(1)

nPeriphRequest(3)

nInit(1)

nReverseRqst(3)

nSelectIn(1,3)

(1) = Compatible Mode

SMSC LPC47B27x

- 74 -

DATASHEET

Rev. 04-17-07

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