LPC47B37X View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
LPC47B37X
SMSC -> Microchip
'LPC47B37X' PDF : 254 Pages View PDF
Compatibility
The LPC47B37x was designed with software compatibility in mind. It is a fully backwards- compatible
solution with the older generation 765A/B disk controllers. The FDC also implements on-board registers for
compatibility with the PS/2, as well as PC/AT and PC/XT, floppy disk controller subsystems. After a
hardware reset of the FDC, all registers, functions and enhancements default to a PC/AT, PS/2 or PS/2
Model 30 compatible operating mode, depending on how the IDENT and MFM bits are configured by the
system BIOS.
Direct Support for Two Floppy Drives
The nMTR1 function is on pin 43. nMTR1 is the second alternate function on the GP22 pin. Pin 43 has
the IO12 buffer type.
The nMTR1 function is selectable as open drain or push pull as nMTR0 is through bit 6 of the FDD
Mode Register in CRF0 of LD 0. This overrides the selection of the output type through bit 7 of the
GPIO control register. It is also controlled by bit 7 of the FDD Mode Register.
The nDS1 function is on pin 41. nDS1 is the second alternate function on the GP20 pin. Pin 41 has
IO12 buffer type.
The nDS1 function is selectable as open drain or push pull as nDS0 is through bit 6 of the FDD Mode
Register in CRF0 of LD 0. This overrides the selection of the output type through bit 7 of the GPIO
control register. It is also controlled by bit 7 of the FDD Mode register.
See the Runtime Registers section for register information.
Disk Change Support for Second Floppy
Bit[1] in the Force Disk Change register supports the second floppy. Setting either of the Force Disk
Change bits active forces the internal FDD nDSKCHG active when the appropriate drive has been
selected. The Force Disk Change register is defined in the Runtime Registers section.
Force Write Protect Support for Second Floppy
Bit[0] in the Device Disable register and FDD Option register support floppy write protect.
See the Runtime Registers section for Device Disable register description and the Configuration
Registers section for FDD Option register description.
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