UART Power Management
Direct power management is controlled by CR22. Refer to CR22 for more information.
Auto Power Management is enabled by CR23-B4 and B5. When set, these bits allow the following auto power
management operations:
1) The transmitter enters auto powerdown when the transmit buffer and shift register are empty.
2) The receiver enters powerdown when the following conditions are all met:
a) Receive FIFO is empty
b) The receiver is waiting for a start bit.
Note: While in powerdown the Ring Indicator interrupt is still valid and transitions when the RI input changes.
Exit Auto Powerdown
The transmitter exits powerdown on a write to the XMIT buffer. The receiver exits auto powerdown when RXDx
changes state.
Parallel Port
Direct power management is controlled by CR22. Refer to CR22 for more information.
Auto Power Management is enabled by CR23-B3. When set, this bit allows the ECP or EPP logical parallel port blocks
to be placed into powerdown when not being used.
The EPP logic is in powerdown under any of the following conditions:
1) EPP is not enabled in the configuration registers.
2) EPP is not selected through ecr while in ECP mode.
The ECP logic is in powerdown under any of the following conditions:
1) ECP is not enabled in the configuration registers.
2) SPP, PS/2 Parallel port or EPP mode is selected through ecr while in ECP mode.
Exit Auto Powerdown
The parallel port logic can change powerdown modes when the ECP mode is changed through the ecr register or when
the parallel port mode is changed through the configuration registers.
SMSC DS – LPC47M14X
Page 97
Rev. 03/19/2001