BIT NO.
7
6
5
4
3
2
1
0
SYMBOL
CM
DD
WC
BC
MD
Table 14 – Status Register 2
NAME
DESCRIPTION
Unused. This bit is always "0".
Control Mark Any one of the following:
Read Data command - the FDC encountered a deleted
data address mark.
Read Deleted Data command - the FDC encountered a
data address mark.
Data Error in The FDC detected a CRC error in the data field.
Data Field
Wrong
The track address from the sector ID field is different
Cylinder
from the track address maintained inside the FDC.
Unused. This bit is always "0".
Unused. This bit is always "0".
Bad Cylinder The track address from the sector ID field is different
from the track address maintained inside the FDC and is
equal to FF hex, which indicates a bad track with a hard
error according to the IBM soft-sectored format.
Missing Data The FDC cannot detect a data address mark or a deleted
Address Mark data address mark.
BIT NO.
7
6
5
4
3
2
1,0
SYMBOL
WP
T0
HD
DS1,0
Table 15 – Status Register 3
NAME
DESCRIPTION
Unused. This bit is always "0".
Write
Indicates the status of the WRTPRT pin.
Protected
Unused. This bit is always "1".
Track 0
Indicates the status of the TRK0 pin.
Unused. This bit is always "1".
Head Address Indicates the status of the HDSEL pin.
Drive Select Indicates the status of the DS1, DS0 pins.
RESET
There are three sources of system reset on the FDC: the nPCI_RESET pin, a reset generated via a bit in
the DOR, and a reset generated via a bit in the DSR. At power on, a Power On Reset initializes the FDC.
All resets take the FDC out of the power down state.
All operations are terminated upon a nPCI_RESET, and the FDC enters an idle state. A reset while a disk
write is in progress will corrupt the data and CRC.
On exiting the reset state, various internal registers are cleared, including the Configure command
information, and the FDC waits for a new command. Drive polling will start unless disabled by a new
Configure command.
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