LS7060C View Datasheet(PDF) - LSI Corporation
Part Name
Description
MFG CO.
'LS7060C' PDF : 7 Pages View PDF
INPUT CURRENT
*SCAN RESET/LOAD
**All Count inputs
SYMBOL
MIN
IIH
-
IIL
-
IIH
-
IIL
-
*Input has internal pull-up resistor to VDD
** Inputs have internal pull-down resistor to VSS
MAX
-3.5
-5
5
1
DYNAMIC ELECTRICAL CHARACTERISTICS:
(VDD = +5V ± 5%, VSS = 0V, TA = 0˚C to +70˚C unless otherwise noted.)
PARAMETER
Count Frequency
(All Count inputs)
Count Pulse Width
(All Count Inputs)
SYMBOL
MIN
fc
DC
tCPW
10
MAX
50
-
Count Ripple Time
tCR
-
20
Reset Pulse Width
(All Counter Stages
Fully Reset)
tRPW
20
-
RESET Removal Time
tRR
-
10
(Reset Removed From
All Counter Stages)
SCAN Frequency
SCAN Pulse Width
fSC
-
10
tSCPW
50
-
SCAN RESET/LOAD
tRSCPW
10
-
Pulse Width
(All latches loaded and
Scan Counter Reset to
Least Significant Byte)
SCAN RESET/LOAD
tRSCR
-
10
Removal Time
(Reset Removed from
Scan Counter; Load
Command Removed
From Latches)
Output Disable
Delay Time
(B0 - B7)
tDOD
-
5
Output ENABLE
Delay Time
(B0 - B7)
tDOE
-
5
Output Delay Time
CASCADE ENABLE
tDCE
-
10
UNIT
µA
µA
µA
µA
CONDITIONS
VDD = Max, VIH = +3.5V
VDD = Max, VIL = 0V
VDD = Max, VIH = +3.5V
VDD = Max, VIL = 0.35V
UNIT
MHz
ns
ns
ns
CONDITIONS
-
Measured at 50% point,
Max tr, tf = 1ns
Transition from 32 ones to 32 zeros
from negative edge of count pulse
Measured at 50% point
Max tr, tf = 10ns
ns Measured from RESET signal at VIH
MHz
ns
ns
Measured at 50% point
Max tr, tf = 10ns
Measured at 50% point
Max tr, tf = 5ns
ns Measured from
SCAN RESET/LOAD at VIH
ns Transition to Output High
Impedance State Measured
From Scan at VIL or
ENABLE at VIH
ns Transition to Valid On State
Measured from Scan at VIH
and ENABLE at VIL; Delay to
Valid Data Levels for COL = 10pF
and one TTL Load or Valid Data
Currents for High Capacitance Loads
ns Negative Transition from Scan at VIL
and ST5 of Scan Counter or Positive
Transition From SCAN RESET/LOAD at
VIL to Valid Data Levels for COL = 12pF
and one TTL Load
7060C/61C-121901-3
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