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LT1209C View Datasheet(PDF) - Linear Technology

Part Name
Description
MFG CO.
LT1209C
Linear
Linear Technology Linear
'LT1209C' PDF : 12 Pages View PDF
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LT1208/LT1209
APPLICATI S I FOR ATIO
Large-Signal Transient Response
AV = 1
1208/09 AI04
Large-Signal Transient Response
AV = –1
1208/09 AI06
Power Dissipation
The LT1208/LT1209 combine high speed and large output
current drive in small packages. Because of the wide
supply voltage range, it is possible to exceed the maxi-
mum junction temperature under certain conditions.
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) as
follows:
LT1208CN8:
LT1208CS8:
LT1209CN:
LT1209CS:
TJ = TA + (PD × 100°C/W)
TJ = TA + (PD × 150°C/W)
TJ = TA + (PD × 70°C/W)
TJ = TA + (PD × 100°C/W)
Maximum power dissipation occurs at the maximum
supply current and when the output voltage is at 1/2 of
either supply voltage (or the maximum swing if less than
1/2 supply voltage).
For each amplifier PDMAX is as follows:
PDMAX
=
(V+
–
V–)(ISMAX)
+
(0.5V+)2
RL
Example: LT1208 in S8 at 70°C, VS = ±10V, RL = 500Ω
PDMAX =
(20V)(10.5mA) +
(5V)2
500Ω
= 260mW
TJ = 70°C + (2 × 260mW)(150°C/W) = 148°C
Low Voltage Operation
The LT1208/LT1209 are functional at room temperature
with only 3V of total supply voltage. Under this condition,
however, the undistorted output swing is only 0.8VP-P . A
more realistic condition is operation at ±2.5V supplies (or
5V and ground). Under these conditions, at room tem-
perature, the typical input common-mode range is 1.9V to
–1.3V (for a VOS change of 1mV), and a 5MHz, 2VP-P sine
wave can be faithfully reproduced. With 5V total supply
voltage the gain-bandwidth is reduced to 26MHz and the
slew rate is reduced to 135V/µs.
DAC Current-to-Voltage Converter
The wide bandwidth, high slew rate and fast settling time
of the LT1208/LT1209 make them well-suited for current-
to-voltage conversion after current output D/A converters.
A typical application with a DAC-08 type converter (full-
scale output of 2mA) uses a 5k feedback resistor. A 7pF
compensation capacitor across the feedback resistor is
used to null the pole at the inverting input caused by the
DAC output capacitance. The combination of the LT1208/
LT1209 and DAC settles to less than 40mV (1LSB) in
140ns for a 10V step.
8
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