LT1640HCS8 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LT1640HCS8' PDF : 16 Pages View PDF
LT1640L/LT1640H
APPLICATIONS INFORMATION
When the DRAIN voltage of the LT1640L is high with
respect to VEE, the internal pull-down transistor Q2 is off
and the PWRGD pin is in a high impedance state (Fig-
ure␣ 12). The PWRGD pin will be pulled high by the module’s
internal pull-up current source, turning the module off.
When the DRAIN voltage drops below VPG, Q2 will turn on
and the PWRGD pin will pull low, enabling the module.
The PWRGD signal can also be used to turn on an LED or
optoisolator to indicate that the power is good as shown
in Figure 13.
Gate Pin Voltage Regulation
When the supply voltage to the chip is more than 15.5V,
the GATE pin voltage is regulated at 13.5V above VEE. If the
supply voltage is less than 15.5V, the GATE voltage will be
about 2V below the supply voltage. At the minimum 10V
supply voltage, the gate voltage is guaranteed to be greater
than 6V. The gate voltage will be no greater than 18V for
supply voltages up to 80V.
(SHORT PIN)
GND
GND
LT1640L
R4
3
UV
+
R5
2
+– VPG
–
OV
R6
*
VEE SENSE
4
5
8
VDD PWRGD 1
+
Q2
VEE
DRAIN 7
GATE
6
1N4148
R3
C1 R2
C2
ACTIVE LOW
ENABLE MODULE
VIN+ VOUT+
ON/OFF
C3
VIN– VOUT–
3
R1
4
– 48V
1
2
Q1
* DIODES INC. SMAT70A
1640 F12
Figure 12. Active Low Enable Module
(SHORT PIN)
GND
GND
R4
562k
1%
R5
9.09k
1%
R6
10k
1%
3
UV
2
OV
VEE
4
SENSE
5
8
VDD
LT1640L
GATE
6
R7
51k
5%
1
PWRGD
MOC207
DRAIN
7
1N4148
PWRGD
+ C3
100µF
100V
*
– 48V
* DIODES INC. SMAT70A
R1
3
0.02Ω
5%
4
1
2
C1
150nF
25V
R2 R3
10Ω 18k C2
5% 5% 3.3nF
100V
Q1
IRF530
1640 F13
Figure 13. Using PWRGD to Drive an Optoisolator
1640lhfb
13
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