LT1769 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LT1769
Linear Technology
'LT1769' PDF : 16 Pages View PDF
LT1769
APPLICATIONS INFORMATION
45
40
35
30
2-LAYER BOARD
25
4-LAYER BOARD
20
MEASURED FROM AIR AMBIENT
15 TO DIE USING COPPER LANDS
AS SHOWN ON DATA SHEET
10
05
10 15 20 25
BOARD AREA (IN2)
30 35
1769 F08
Figure 8. LT1769 Thermal Resistance
70
NOTE: PEAK DIE TEMPERATURE
WILL BE ABOUT 15°C HIGHER AT
60 2A CHARGE CURRENT
VIN = 19V
VBAT = 12.3V
50 VBOOST = 5V
2-LAYER BOARD
5 IN2 BOARD
ROOM TEMP = 24°C
40
25 IN2 BOARD
30
20
0
0.5
1
1.5
2
CHARGE CURRENT (A)
1769 F09
Figure 9. LT1769 Lead Temperature
STANDARD CONNECTION
C3
0.47µF
D2
SW
BOOST
LT1769
SPIN
SENSE BAT
+
HIGH DUTY CYCLE CONNECTION
C3
0.47µF
D2
VX
3V TO 6V
CX
10µF
VBAT
SW
BOOST
LT1769
SPIN
SENSE BAT
+
Figure 10. High Duty Cycle
HIGH DUTY CYCLE CONNECTION
VIN
Q1
+
RX
50k
Q1 = Si4435DY
Q2 = TP0610L
Q2
C2
D1
0.47µF
D2
VX
3V TO 6V
CX
10µF
SW VCC
BOOST
LT1769
SPIN
SENSE BAT
+
Figure 11. Replacing the Input Diode
VBAT
1769 F10
VBAT
1769 F11
an 18V ±3% adapter is used to charge ten NiMH cells, the
charger must put out approximaly 15V. A total of 1.6V is
lost in the input diode, switch resistance, inductor resis-
tance and parasitics, so the required duty cycle is
15/16.4 = 91.4%. The duty cycle can be extended to 93%
by restricting boost voltage to 5V instead of using VBAT as
is normally done. This lower boost voltage also reduces
power dissipation in the LT1769, so it is a win-win
decision. Connect an external source of 3V to 6V at VX
node in Figure 10 with a 10µF CX bypass capacitor.
Lower Dropout Voltage
For even lower dropout and/or reducing heat on the board,
the input diode D3 can be replaced with a FET (see Figure
11). Connect a P-channel FET in place of the input diode
14
with its gate connected to the battery causing the FET to
turn off when the input voltage goes low. The problem is
that the gate must be pumped low so that the FET is fully
turned on even when the input is only a volt or two above
the battery voltage. Also there is a turn-off speed issue.
The FET should turn off instantly when the input is dead
shorted to avoid large current surges from the battery
back through the charger into the FET. Gate capacitance
slows turn-off, so a small P-channel (Q2) is added to
discharge the gate capacitance quickly in the event of an
input short. The Q2 body diode creates the necessary
pumping action to keep the gate of Q1 low during normal
operation. Note that Q1 and Q2 have a VGS spec limit of
20V. This restricts VIN to a maximum of 20V. For low
dropout operation with VIN > 20V consult factory.
1769fa
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