LT1886CS8 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LT1886CS8' PDF : 16 Pages View PDF
LT1886
APPLICATIO S I FOR ATIO
Table 2. ADSL Upstream Driver Designs
STANDARD
Line Impedance
100Ω
Line Power
13dBm
Peak-to-Average Ratio
5.33
Transformer Turns Ratio
2
Reflected Impedance
25Ω
Back-Termination Resistors
12.5Ω
Transformer Insertion Loss
1dB
Average Amplifier Swing
Average Amplifier Current
Peak Amplifier Swing
0.79VRMS
31.7mARMS
4.21V Peak
Peak Amplifier Current
169mA Peak
Total Average Power Consumption
550mW
Supply Voltage
Single 12V
LOW POWER
100Ω
13dBm
5.33
1
100Ω
8.35Ω
0.5dB
0.87VRMS
15mARMS
4.65V Peak
80mA Peak
350mW
Single 12V
Table 2 compares the two approaches. It may seem that
the low power design is a clear choice, but there are further
system issues to consider. In addition to driving the line,
the amplifiers provide back-termination for signals that
are received simultaneously from the line. In order to
reject the drive signal, a receiver circuit is used such as
shown in Figure 10. Taking advantage of the differential
nature of the signals, the receiver can subtract out the
drive signal and amplify the received signal. This method
works well for standard back-termination. If the back-
termination resistors are reduced by positive feedback, a
portion of the received signal also appears at the amplifier
outputs. The result is that the received signal is attenuated
Vi +
8.45Ω
–
523Ω
1k
1.21k
1:1
1µF
523Ω
1k
1.21k
100Ω
–
+
–Vi
8.45Ω
AV = 10
1886 F09
Figure 9. Power Saving ADSL Modem Driver
by the same amount as the reduction in the back-termina-
tion resistor. Taking into account the different transformer
turns ratios, the received signal of the low power design
will be one third of the standard design received signal.
The reduced signal has system implications for the sensi-
tivity of the receiver. The power reduction may, or may not,
be an acceptable system tradeoff for a given design.
Demo Board
Demo board DC304 has been created to provide a versatile
platform for a line driver/receiver design. (Figure 11 shows
a complete schematic.) The board is set up for either single
or dual supply designs with Jumpers 1–4. The LT1886 is
set up for differential, noninverting gain of 3. Each amp is
configured as in Figure 5 for maximum flexibility. The
amplifiers drive a 1:2 transformer through back-termina-
tion resistors that can be reduced with optional positive
feedback. The secondary of the transformer can be iso-
lated from the primary with Jumper 5.
A differential receiver is included using the LT1813, a dual
100MHz, 750V/µs operational amplifier. The receiver gain
from the transformer secondary is 2, and the drive signals
are rejected by approximately a factor of 14dB. Other
optional components include filter capacitors and an RC
snubber network at the transformer primary.
Va
RBT
VL
1:n
RL
–Va
RF
RD
RBT
–VL
RG
+
LT1813
VRX
VBIAS
–
LT1813
RD
RF
RG
RL
n2
= REFLECTED IMPEDANCE
RL
2n2
RL
2n2
+ RBT
= ATTENUATION OF Va
RL
SET RG =
2n2
RD
RL
2n2
+ RBT
1886 F10
Figure 10. Receiver Configuration
13
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