LT3781
APPLICATIO S I FOR ATIO
Oscillator Synchronization
Synchronization of the LT3781 system clock is accom-
plished by driving a TTL level logic pulse train at the
desired system switching frequency into the SYNC pin. In
order to assure proper synchronization, each phase of the
synchronization signal must be less than an oscillator
free-run cycle.
The SYNC input pulse controls the phasing as well as the
frequency of controller switching. The SYNC circuit func-
tions by forcing the phase of the oscillator output flip-flop
to match the phase of the SYNC pulse and prematurely
ending the oscillator charge cycle on each transition edge.
At the SYNC logic low-to-high transition, the LT3781
starts a switch-on cycle and the minimum switch-off
period is forced during the SYNC logic low period. Be-
cause the SYNC logic low period corresponds directly to
the minimum off time, the converter maximum duty cycle
can be forced using the SYNC input. For example, a 30%
duty cycle SYNC pulse forces 30% maximum duty cycle
operation for the converter. Because the logic-low pulse
width exceeds the logic-high pulse width in < 50% duty
cycle operation, the oscillator free-run cycle time must be
programmed to exceed the logic-low duration.
2.5V
FSET
1.5V
SYNC
SYSTEM
CLOCK
(INTERNAL)
3781 F04
Figure 4. Oscillator/SYNC Waveforms
It is also possible to run the LT3781 in a SYNC-only mode
by disabling the oscillator completely. Connecting a resis-
tor divider from the 5VREF pin to the FSET pin forcing a
voltage within the charge range of 1.5V-2.5V will allow the
oscillator to follow the SYNC input exclusively with no
provision for free-run. Setting values to force a voltage as
close to 2V as possible is recommended.
5 5VREF
75k
LT3781
6 FSET
51k
100pF
3781 F05
Figure 5. Oscillator Connection for SYNC-Only Mode Operation
Bootstrap Start
It is inefficient as well as impractical to power a controller
IC from a high-voltage input supply. Using a linear
preregulation scheme to provide the required VCC voltage
for the LT3781 would waste significant power, reducing
converter efficiencies and creating additional thermal con-
cerns. Self-biased power schemes take advantage of
inherent converter efficiencies to significantly reduce losses
associated with powering the controller. Bootstrapped
power can be derived using auxiliary windings on the
power transformer or inductor, rectified taps on switching
nodes, or the converter output directly.
Start-up circuitry built into the LT3781 allows VCC to
increase from 0V to 14.5V before the converter is enabled.
During this time, start-up current is less than 1mA. The
trickle current required for charging the VCC supply is
typically generated with a resistor from the converter high
voltage input. When combined with the VCC bypass ca-
pacitor, the current through the start-up resistor creates a
voltage ramp on VCC whose slope governs the turn-on
time of the converter. The low quiescent current of the
LT3781 allows the input voltage to be trickled up with
minimal power dissipation in the start-up resistor. At
VCC = 14.5V, the LT3781 internal circuitry is enabled and
switching begins. If enough bootstrap power is fed back
into VCC to keep that supply voltage above 8.4V, then
switching continues and a bootstrap start is accom-
plished. If the input voltage drops below 8.4V, the LT3781
is disabled and the switching regulator returns to the
start-up low current state.
3781f
13