LT3971/LT3971-3.3/LT3971-5
TYPICAL APPLICATIONS
4V Step-Down Converter with a High Impedance Input Source
+
24V
–
11M
+ CBULK
100µF
1M
4.7µF
1nF
VIN
EN
BOOST
PG
SW
SS LT3971
RT
BD
49.9k
SYNC GND FB
f = 800kHz
0.47µF
4.7µH
10pF
1M
412k
3971 TA09a
VOUT
4V
1.2A*
100µF
* AVERAGE OUTPUT POWER CANNOT
EXCEED THAT WHICH CAN BE PROVIDED
BY HIGH IMPEDANCE SOURCE.
NAMELY,
POUT(MAX) =
V2
4R
•η
WHERE V IS VOLTAGE OF SOURCE, R IS
INTERNAL SOURCE IMPEDANCE, AND η IS
LT3971 EFFICIENCY. MAXIMUM OUTPUT
CURRENT OF 1.2A CAN BE SUPPLIED FOR A
SHORT TIME BASED ON THE ENERGY
WHICH CAN BE SOURCED BY THE BULK
INPUT CAPACITANCE.
Sourcing a Maximum Load Pulse
VOUT
200mV/DIV
VIN
5V/DIV
Start-Up from High Impedance Input Source
VIN
1V/DIV
VOUT
2V/DIV
IL
1A/DIV
500µs/DIV
3971 TA09b
IL
500mA/DIV
2ms/DIV
3971 TA09c
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
R = 0.125
TYP
6
0.40 ± 0.10
10
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PIN 1
PACKAGE TOP MARK
OUTLINE (SEE NOTE 6)
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.200 REF
3.00 ±0.10 1.65 ± 0.10
(4 SIDES) (2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
0.75 ±0.05
(DD) DFN REV C 0310
5
1
0.25 ± 0.05
0.50 BSC
0.00 – 0.05
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3971fd
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