LTC1143 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1143' PDF : 20 Pages View PDF
LTC1143/LTC1143L
LTC1143L-ADJ
APPLICATIONS INFORMATION
The LTC1143L-ADJ outputs can be turned off in one of two
ways: 1) by placing a power MOSFET switch in the VIN line
to the entire regulator or 2) by pulling the VFB pin over
1.4V, which trips comparator V and forces P-DRIVE high
(see Functional Diagram). VFB can be pulled high with a
small current, but any circuitry used to shut down the
LTC1143L-ADJ in this manner must minimize VFB lead
length to prevent noise coupling during normal operation.
In the Figure 6 circuit, taking SHUTDOWN high turns on
PNP QSD that sources a current into VFB. To shut down
properly, RSD must be chosen to pull VFB above 1.4V with
VOUT at 0V and minimum VIN. Note that this technique
depends on the load resistance to prevent VOUT from
floating up due to the current flowing into VFB.
δP = 0.005(100 – 25) = 0.38. The maximum RDS(ON) for
each MOSFET can now be calculated:
( )(() ) P-Ch
RDS(ON)
=
1
2
3.3
41
2
2 1.38
=
0.11Ω
Allowing for VIN being slightly below the VGS used to
specify RDS(ON), this requirement can be met by half of
a Siliconix Si4953DY, Fairchild NDS8947 or similar
SO-8 dual P-channel MOSFET.
The most stringent requirement for the Schottky diode is
with VOUT = 0V (i.e. short circuit). During a continuous short
circuit, the worst-case Schottky diode dissipation rises to:
VFB
100pF
VOUT
VIN
R2
RSD 200k
QSD
R1
50k
100k
SHUTDOWN
1143 F06
( ) PD
=
ISC(AVG)
VD
1−
VOUT
VIN
With the 0.05Ω sense resistor, ISC(AVG) = 2A will result,
increasing the 0.4V Schottky diode dissipation to 0.8W.
CIN will require an RMS current rating of at least 1A at
temperature and COUT will require an ESR of 0.05Ω for
optimum efficiency.
Figure 6. Local VFB Pull-Up Shuts Down LTC1143L-ADJ
Design Example
As a design example, assume VIN = 12V(nominal), VOUT =
3.3V, IMAX = 2A and ƒ = 200kHz. RSENSE, CT and L can
immediately be calculated:
RSENSE = 100mV/2 = 0.05Ω
tOFF = (1/200kHz)[1 – (3.3/12)] = 3.63µs
CT = 3.63µs/(1.3 × 104) = 280pF (use 300pF)
LMIN = 5.1(105 )(0.05Ω)(300pF) 3.3V = 25µH
Assume a dual P-channel power MOSFET is to be
used and dissipation is to be limited to 1W total at
worst-case lowest VIN = 4V. If TA = 50°C and the
thermal resistance of the MOSFET package is 50°C/W,
then the junction temperature will be 100°C and
Troubleshooting Hints
Since efficiency is critical to LTC1143 series applications
it is very important to verify that the circuit is functioning
correctly in both continuous and Burst Mode operation.
The waveform to monitor is the voltage on the timing
capacitor Pins 6 and 14.
In continuous mode (ILOAD > IBURST) the voltage on the CT
pin should be a sawtooth with a 0.9VP-P swing. This
voltage should never dip below 2V as shown in Figure 7a.
When load currents are low (ILOAD < IBURST) Burst Mode
operation occurs. The voltage on the CT pin now falls to
ground for periods of time as shown in Figure 7b.
If Pin 6 or Pin 14 is observed falling to ground at high
output currents, it indicates poor decoupling or improper
grounding. Refer to the Board Layout Checklist.
14
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