LTC1197 View Datasheet(PDF) - Linear Technology

Part Name

Description

MFG CO.

LTC1197

10-Bit, 500ksps ADCs in MSOP with Auto Shutdown

Linear Technology 

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LTC1197/LTC1197L

LTC1199/LTC1199L

TYPICAL APPLICATIO S

Interfacing to the Parallel Port of the

Intel 8051 Family

The Intel 8051 has been chosen to demonstrate the

interface between the LTC1199 and parallel port micro-

processors. Normally, the CS, CLK and DIN signals would

be generated on three port lines and the DOUT signal read

on a fourth port line. This works very well. However, we

will demonstrate here an interface with the DIN and DOUT

of the LTC1199 tied together as described in the

SERIAL INTERFACE section. This saves one wire.

The 8051 first sends the start bit and MUX address to the

LTC1199 over the data line connected to P1.2. Then P1.2

is reconfigured as an input (by writing to it a one) and

the 8051 reads back the 8-bit A/D result over the same

data line.

ANALOG

INPUTS

LTC1199

CS

CLK

DOUT

DIN

MUX ADDRESS

A/D RESULT

P1.4

P1.3

P1.2

8051

1197/99 TA06

LABEL

LOOP 1

LOOP

MNEMONIC

MOV

SETB

CLR

MOV

RLC

CLR

MOV

SETB

DJNZ

MOV

CLR

MOV

MOV

RLC

SETB

CLR

DJNZ

MOV

MOV

SETB

CLR

CLR

RLC

MOV

RRC

RRC

MOV

SETB

OPERAND

A, #FFH

P1.4

P1.4

R4, #04

A

P1.3

P1.2, C

P1.3

R4, LOOP 1

P1, #04

P1.3

R4, #0AH

C, P1.2

A

P1.3

P1.3

R4, LOOP

R2, A

C, P1.2

P1.3

P1.3

A

A

C, P1.2

A

A

R3, A

P1.4

COMMENTS

DIN word for LTC1199

Make sure CS is high

CS goes low

Load counter

Rotate DIN bit into Carry

CLK goes low

Output DIN bit into Carry

CLK goes high

Next bit

Bit 2 becomes an input

CLK goes low

Load counter

Read data bit into Carry

Rotate data bit into ACC

CLK goes high

CLK goes low

Next bit

Store MSBs in R2

Read data bit into Carry

CLK goes high

CLK goes low

Clear ACC

Rotate data bit from Carry to

ACC

Read data bit into Carry

Rotate right into ACC

Rotate right into ACC

Store LSBs in R3

CS goes high

DOUT from LTC1199 Stored in 8051 RAM

MSB

R2 B9 B8 B7 B6 B5 B4 B3 B2

LSB

R3 B1 B0 0 0 0 0 0 0

1197/99 TA07

CS

1

2

3

4

CLK

DATA (DIN/DOUT)

START

SGL/

DIFF

ODD/ DUMMY

SIGN

8051 P1.2 OUTPUTS DATA

TO LTC1199

8051 P1.2 RECONFIGURED

AS AN INPUT AFTER THE 4TH RISING

CLK AND BEFORE THE 4TH FALLING CLK

B9

B8

B7

B6

B5

B4

B3

LTC1199 SENDS A/D RESULT

BACK TO 8051 P1.2

LTC1199 TAKES CONTROL OF DATA LINE

ON 4TH FALLING CLK

B2

B1

B0

1197/99 TA08

23

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