LTC1267
LTC1267-ADJ/LTC1267-ADJ5
UU W U
APPLICATIO S I FOR ATIO
The VFB1, 2 pin is extremely sensitive to pickup from the
inductor switching node. Care should be taken to isolate
the feedback network from the inductor and a 100pF
capacitor should be connected between the VFB1, 2 and
SGND pins next to the package.
The circuit in Figure 6 cannot be used to regulate a VOUT
which is greater than the maximum voltage allowed on the
LTC1267 EXT VCC pin (10V). In applications with
VOUT > 10V, RSENSE must be moved to the ground side of
the output capacitor and load. This operates the current
sense comparator at 0V common mode, increasing the
off-time approximately 40% and requiring the use of a
smaller timing capacitor CT.
VFB1, 2
SGND
100pF
R2
R1
RSENSE
+
VOUT
COUT
LTC1267 • F06
Figure 6. LTC1267-ADJ/LTC1267-ADJ5
External Feedback Network
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
% Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power. (For high efficiency circuits, only small
errors are incurred by expressing losses as a percentage
of output power.)
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1267 circuits:
1. LTC1267 VIN current
2.
3.
LI2TRCl1o2s6s7esVCC current
4. P-channel transition losses
1. LTC1267 VIN current is the DC supply current given in
the electrical characteristics which excludes MOSFET
driver and control currents. VIN currents results in a
small (<1%) loss which increases with VIN.
2. LTC1267 VCC current is the sum of the MOSFET driver
and control circuits currents. The MOSFET driver cur-
rent results from switching the gate capacitance of the
power MOSFETs. Each time a MOSFET gate is switched
from low to high to low again, a packet of charge dQ
moves from VCC to ground. The resulting dQ/dt is a
current out of VCC which is typically much larger than
the control circuit current. In continuous mode IGATECHG
≈ fO(QP +QN), where QP and QN are the gate charges of
the two MOSFETs.
By powering EXT VCC from an output-derived source,
the additional VIN current resulting from the driver and
control currents will be scaled by a factor of Duty Cycle/
Efficiency. For example, in a 20V to 5V application,
10mA of VCC current results in approximately 3mA of
VIN current. This reduces the mid-current loss from
10% or more (if the driver was powered directly from
VIN) to only a few percent.
3. I2R losses are easily predicted from the DC resistances
of the MOSFET, inductor, and current shunt. In continu-
ous mode all the output current flows through L and
RSENSE, but is “chopped” between the P-channel and N-
channel MOSFETs. If the two MOSFETs have approxi-
mately the same RDS(ON), then the resistance of one
MOSFET can simply be summed with the resistances of
L and RSENSE to obtain I2R losses. For example, if each
RDS(ON) = 0.1Ω, RL = 0.15Ω, and RSENSE = 0.05Ω, then
the total resistance is 0.3Ω. This results in losses
ranging from 3% to 12% as the output current increases
from 0.5A to 2A. I2R losses cause the efficiency to roll
off at high output currents.
4. Transition losses apply only to the P-channel MOSFET
and only when operating at high input voltages (typically
20V or greater). Transition losses can be estimated
from:
Transition Loss ≈ 5 × VIN2 × IMAX × CRSS × fO
Other losses including CIN and COUT ESR dissipative
losses, Schottky conduction losses during dead-time,
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