LTC1288CS8 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1288CS8' PDF : 24 Pages View PDF
LTC1285/LTC1288
TYPICAL APPLICATIONS N
Interfacing to the Parallel Port of the INTEL 8051
Family
The Intel 8051 has been chosen to demonstrate the
interface between the LTC1288 and parallel port micro-
processors. Normally the CS, CLK and DIN signals would
be generated on 3 port lines and the DOUT signal read on
a 4th port line. This works very well. However, we will
demonstrate here an interface with the DIN and DOUT of the
LTC1288 tied together as described in the SERIAL INTER-
FACE section. This saves one wire.
The 8051 first sends the start bit and MUX address to the
LTC1288 over the data line connected to P1.2. Then P1.2
is reconfigured as an input (by writing to it a one) and the
8051 reads back the 12-bit A/D result over the same data
line.
ANALOG
INPUTS
CS
CLK
LTC1288
DOUT
DIN
MUX ADDRESS
A/D RESULT
P1.4
P1.3
8051
P1.2
LTC1285/88 • TA01
DOUT FROM 1288 STORED IN 8501 RAM
MSB
R2 B11 B10 B9 B8 B7 B6 B5 B4
LSB
R3 B3 B2 B1 B0 0 0 0 0
LABEL
LOOP 1
LOOP 2
LOOP 3
LOOP 4
MNEMONIC
MOV
SETB
CLR
MOV
RLC
CLR
MOV
SETB
DJNZ
MOV
CLR
MOV
MOV
RLC
SETB
CLR
DJNZ
MOV
CLR
MOV
MOV
RLC
SETB
CLR
DJNZ
MOV
RRC
DJNZ
MOV
SETB
OPERAND
A, #FFH
P1.4
P1.4
R4, #04
A
P1.3
P1.2, C
P1.3
R4, LOOP 1
P1, #04
P1.3
R4, #09
C, P1.2
A
P1.3
P1.3
R4, LOOP 2
R2, A
A
R4, #04
C, P1.2
A
P1.3
P1.3
R4, LOOP 3
R4, #04
A
R4, LOOP 4
R3, A
P1.4
COMMENTS
DIN word for LTC1288
Make sure CS is high
CS goes low
Load counter
Rotate DIN bit into Carry
SCLK goes low
Output DIN bit to LTC1288
SCLK goes high
Next bit
Bit 2 becomes an input
SCLK goes low
Load counter
Read data bit into Carry
Rotate data bit into Acc.
SCLK goes high
SCLK goes low
Next bit
Store MSBs in R2
Clear Acc.
Load counter
Read data bit into Carry
Rotate data bit into Acc.
SCLK goes high
SCLK goes low
Next bit
Load counter
Rotate right into Acc.
Next Rotate
Store LSBs in R3
CS goes high
MSBF BIT LATCHED
INTO LTC1288
CS
CLK
DATA
(DIN/DOUT)
SGL/
START DIFF ODD/ MSBF
SIGN
8051 P1.2 OUTPUTS DATA
TO LTC1288
8051 P1.2 RECONFIGURED
AS IN INPUT AFTER THE 4TH RISING CLK
AND BEFORE THE 4TH FALLING CLK
22
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
LTC1288 SENDS A/D RESULT
BACK TO 8051 P1.2
LTC1288 TAKES CONTROL OF DATA
LINE ON 4TH FALLING CLK
LTC1285/88 • TA07
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