LTC1325
FUNCTIONAL DESCRIPTIO
Bit 3: Maximum Cell Voltage (FMCV)
The MCV bit indicates when the battery cell voltage has
exceeded the preset limit. The bit is set when VCELL is
greater than the voltage at the MCV pin.
FMCV
0
1
CONDITIONS
VCELL < VMCV
VCELL > VMCV
Bit 4: End Discharge Voltage (FEDV)
The EDV bit indicates when the battery cell voltage has
dropped below an internally preset limit. The bit is set
when the battery cell voltage at the output of the voltage
divider VCELL is less than 900mV.
FEDV
0
1
CONDITIONS
VCELL > 900mV
VCELL < 900mV
Bit 5: High Temperature Fault (FHTF)
The HTF bit indicates when the battery temperature is too
high. Using a negative TC thermistor, the bit is set when
the voltage at the TBAT pin is less than the voltage at the
HTF pin.
FHTF
0
1
CONDITIONS
TBAT > VHTF
TBAT < VHTF
Bit 6: Low Temperature Fault (FLTF)
The LTF bit indicates when the battery temperature is too
low. Using a negative TC thermistor, the bit is set when the
voltage at the TBAT pin is greater than the voltage at the
LTF pin.
FLTF
0
1
CONDITIONS
TBAT < VLTF
TBAT > VLTF
Bit 7: Timeout (tOUT)
The tOUT bit indicates that the battery charging time has
exceeded the preset limit. The bit is set when the internal
timer exceeds the limit set by the command bits TO0, TO1
and TO2.
TOUT
CONDITIONS
0
No Timeout Has Occurred
1
Timeout Has Occurred
Bit 8: Fail-Safe Occurred (FS)
The FS bit indicates that one of the fault detection circuits
halted the discharging or charging cycle. The bit is set
when an EDV, LTF, HTF, or tOUT fault occurs during
discharge. During charging, the bit is set when a MCV,
LTF, HTF, or tOUT fault occurs. The bit is reset by the
command word bit FSCLR.
FS
CONDITIONS
0
No Fail-Safe Has Occurred
1
Fail-Safe Has Occurred
DETAILED DESCRIPTION
Fault Conditions
The LTC1325 monitors the battery for fault conditions
before and during discharge and charge (see Figure 3).
They include: battery removed/present (BATP), battery
reversed/shorted (BATR), maximum cell voltage exceeded
BATP
VDD
1.8V
C1
+–
+
–
C2
FMCV
+
–
VDD
3.072V
LINEAR
REGULATOR
REG RTRK
VBAT
R1
PROGRAMMABLE
R2
BATTERY
DIVIDER
SENSE
REG
MCV
C3
FEDV
+
–
C4
BATR
+
–
C5
FHTF
+–
C6
FLTF
+
–
900mV
100mV
TBAT
HTF
LTF
R3 RL
R4
RT
LTC1325 • F03
Figure 3. Fail-Safe or Fault Detection Circuitry
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