LTC1400CS8TRPBF View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1400CS8TRPBF' PDF : 20 Pages View PDF
LTC1400
APPLICATIO S I FOR ATIO
Input signal leads to AIN and signal return leads from GND
(Pin 4) should be kept as short as possible to minimize
noise coupling. In applications where this is not possible, a
shielded cable between source and ADC is recommended.
Also, since any potential difference in grounds between the
signal source and ADC appears as an error voltage in series
with the input signal, attention should be paid to reducing
the ground circuit impedance as much as possible.
ANALOG SUPPLY
–5V
GND
5V
DIGITAL SUPPLY
GND
5V
the LTC1400 GND pin. The ground return from the LTC1400
Pin 4 to the power supply should be low impedance for
noise free operation. Digital circuitry grounds must be
connected to the digital supply common.
In applications where the ADC data outputs and control sig-
nals are connected to a continuously active microprocessor
bus, it is possible to get errors in the conversion results.
These errors are due to feedthrough from the micropro-
cessor to the successive approximation comparator. The
problem can be eliminated by forcing the microprocessor
into a Wait state during conversion or by using three-state
buffers to isolate the ADC data bus.
+
+
+
VSS
GND
VCC
LTC1400
GND
VCC
DIGITAL CIRCUITRY
1400 F11
Figure 11. Power Supply Connection
Figure 11 shows the recommended system ground connec-
tions. All analog circuitry grounds should be terminated at
Power-Down Mode
Upon power-up, the LTC1400 is initialized to the active
state and is ready for conversion. However, the chip can
be easily placed into the Nap or Sleep mode by exercising
the right combination of CLK and CONV signal. In the Nap
mode all power is off except the internal reference, which is
still active and provides 2.42V output voltage to the other
circuitry. In this mode, the ADC draws only 6mW of power
instead of 75mW (for minimum power, the logic inputs
must be within 500mV of the supply rails). The wake-up
time from the Nap mode to the active mode is 350ns.
CLK
CONV
t11
t1
t11
t1
NAP
SLEEP
VREF
REFRDY
NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS. REFRDY APPEARS AS A BIT IN THE DOUT WORD.
1400 F12
Figure 12. Nap Mode and Sleep Mode Waveforms
1400fa
12
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