LTC1417 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1417' PDF : 32 Pages View PDF
LTC1417
APPLICATIONS INFORMATION
Serial Data Output During a Conversion
Using Internal Clock for Conversion and Data Transfer.
Figure 17 shows data from the previous conversion being
clocked out during the conversion with the LTC1417
internal clock providing both the conversion clock and the
SCLK. The internal clock has been optimized for the fastest
conversion time; consequently, this mode can provide the
best overall speed performance. To select the internal
conversion clock, tie EXTCLKIN (Pin 6) high. The internal
clock appears on CLKOUT (Pin 8) which can be tied to
SCLK (Pin 7) to supply the SCLK.
(SAMPLE N)
EXTCLKIN = 5
t2
CONVST
t3
BUSY (= RD)
CLKOUT (= SCLK)
t7
1
2
13
CONVST
CONVST
14
BUSY
12
RD
BUSY (= RD)
LTC1417
7
SCLK
8
CLKOUT
9
DOUT
CLKOUT ( = SCLK)
DOUT
µP OR DSP
(CONFIGURED
AS SLAVE)
OR
SHIFT
REGISTER
t10
HOLD
3
4
5
6
7
8
9 10 11 12 13 14 15 16
(SAMPLE N + 1)
t5
SAMPLE
HOLD
1
2
3
DOUT
Hi-Z
D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
DATA (N – 1)
tCONV
FILL
ZEROS
t4
Hi-Z
D13
D13 D12 D11
DATA N
t8
1417 F17
CLKOUT
(= SCLK)
DOUT
VIL
t11
t12
D13
D12
VOH
D11
VOL
CAPTURE ON CAPTURE ON
RISING CLOCK FALLING CLOCK
Figure 17. Internal Conversion Clock Selected. Data Transferred During Conversion Using
the ADC Clock Output as a Master Shift Clock (SCLK Driven from CLKOUT)
19
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